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| author | Brian Inglis <Brian.Inglis@SystematicSW.ab.ca> | 2020-08-03 10:22:46 -0600 |
|---|---|---|
| committer | Corinna Vinschen <corinna@vinschen.de> | 2020-08-04 10:10:40 +0200 |
| commit | 4ecc804d54ad1f6e9c64f7379cb24b319a9f3f2b (patch) | |
| tree | c7eb58e254913982aa156dfb7b6aba905af6106f | |
| parent | 12ad9a46dff86b7750aa9c8f8fca7349a0925114 (diff) | |
| download | cygnal-4ecc804d54ad1f6e9c64f7379cb24b319a9f3f2b.tar.gz cygnal-4ecc804d54ad1f6e9c64f7379cb24b319a9f3f2b.tar.bz2 cygnal-4ecc804d54ad1f6e9c64f7379cb24b319a9f3f2b.zip | |
fhandler_proc.cc(format_proc_cpuinfo): add SERIALIZE instruction flag
CPUID 7:0 EDX[14] serialize added in linux-next 5.8 by Ricardo Neri-Calderon:
The Intel architecture defines a set of Serializing Instructions (a
detailed definition can be found in Vol.3 Section 8.3 of the Intel "main"
manual, SDM). However, these instructions do more than what is required,
have side effects and/or may be rather invasive. Furthermore, some of
these instructions are only available in kernel mode or may cause VMExits.
Thus, software using these instructions only to serialize execution (as
defined in the manual) must handle the undesired side effects.
As indicated in the name, SERIALIZE is a new Intel architecture
Serializing Instruction. Crucially, it does not have any of the mentioned
side effects. Also, it does not cause VMExit and can be used in user mode.
This new instruction is currently documented in the latest "extensions"
manual (ISE). It will appear in the "main" manual in the future.
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/arch/x86/include/asm/cpufeatures.h?id=85b23fbc7d88f8c6e3951721802d7845bc39663d
| -rw-r--r-- | winsup/cygwin/fhandler_proc.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/winsup/cygwin/fhandler_proc.cc b/winsup/cygwin/fhandler_proc.cc index 4bb8bea17..72ffa89cd 100644 --- a/winsup/cygwin/fhandler_proc.cc +++ b/winsup/cygwin/fhandler_proc.cc @@ -1578,6 +1578,7 @@ format_proc_cpuinfo (void *, char *&destbuf) ftcprint (features1, 4, "fsrm"); /* fast short REP MOVSB */ ftcprint (features1, 8, "avx512_vp2intersect"); /* vec intcpt d/q */ ftcprint (features1, 10, "md_clear"); /* verw clear buf */ + ftcprint (features1, 14, "serialize"); /* SERIALIZE instruction */ ftcprint (features1, 18, "pconfig"); /* platform config */ ftcprint (features1, 19, "arch_lbr"); /* last branch records */ ftcprint (features1, 28, "flush_l1d"); /* flush l1d cache */ |