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| author | Nick Clifton <nickc@redhat.com> | 2000-12-12 19:25:07 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2000-12-12 19:25:07 +0000 |
| commit | 5092a8140bae33b9b35627677e089964cbccf705 (patch) | |
| tree | b6b4b7be07eaff03cfb510e486e0ae341444b180 /include/opcode/mips.h | |
| parent | 740dea68d0c3484292f7d6452090f3054e3f1b47 (diff) | |
| download | cygnal-5092a8140bae33b9b35627677e089964cbccf705.tar.gz cygnal-5092a8140bae33b9b35627677e089964cbccf705.tar.bz2 cygnal-5092a8140bae33b9b35627677e089964cbccf705.zip | |
Fix Formatting.
Diffstat (limited to 'include/opcode/mips.h')
| -rw-r--r-- | include/opcode/mips.h | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/include/opcode/mips.h b/include/opcode/mips.h index af6c66c19..c493d08dc 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -133,7 +133,6 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * #define OP_SH_CODE19 6 /* 19 bit wait code. */ #define OP_MASK_CODE19 0x7ffff - /* This structure holds information for a particular instruction. */ struct mips_opcode @@ -322,11 +321,11 @@ struct mips_opcode /* LSI R4010 instruction. */ #define INSN_4010 0x00020000 /* NEC VR4100 instruction. */ -#define INSN_4100 0x00040000 +#define INSN_4100 0x00040000 /* Toshiba R3900 instruction. */ -#define INSN_3900 0x00080000 +#define INSN_3900 0x00080000 /* 32-bit code running on a ISA3+ CPU. */ -#define INSN_GP32 0x00100000 +#define INSN_GP32 0x00100000 /* MIPS ISA defines, use instead of hardcoding ISA level. */ |