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author | cvs2svn <> | 2002-07-11 20:14:42 +0000 |
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committer | cvs2svn <> | 2002-07-11 20:14:42 +0000 |
commit | ce122f0260fafd437209005104cb0d6cf24b6817 (patch) | |
tree | d5d0e21b67988b568d0630adec47856777c01b88 /include/opcode/mips.h | |
parent | 357281c75d7dbd491a9ce39121d36c2f0708cb51 (diff) | |
download | cygnal-ce122f0260fafd437209005104cb0d6cf24b6817.tar.gz cygnal-ce122f0260fafd437209005104cb0d6cf24b6817.tar.bz2 cygnal-ce122f0260fafd437209005104cb0d6cf24b6817.zip |
This commit was manufactured by cvs2svn to create branch 'binutils-binutils-2_13-branchpoint
2_13-branch'.
Sprout from kseitz_interps-20020528-branch 2002-06-18 21:15:59 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch'
Cherrypick from master 2002-07-11 20:14:41 UTC DJ Delorie <dj@redhat.com> '* configure.in: Remove two redundant tests.':
COPYING.LIBGLOSS
ChangeLog
Makefile.in
config-ml.in
config.sub
config/ChangeLog
configure
configure.in
etc/ChangeLog
etc/texi2pod.pl
include/ChangeLog
include/bfdlink.h
include/demangle.h
include/dis-asm.h
include/elf/ChangeLog
include/elf/alpha.h
include/elf/common.h
include/elf/dwarf2.h
include/elf/sh.h
include/elf/vax.h
include/fibheap.h
include/gdb/ChangeLog
include/gdb/sim-d10v.h
include/getopt.h
include/hashtab.h
include/libiberty.h
include/opcode/ChangeLog
include/opcode/a29k.h
include/opcode/convex.h
include/opcode/dlx.h
include/opcode/i386.h
include/opcode/mips.h
include/opcode/or32.h
include/partition.h
include/sort.h
include/splay-tree.h
ltcf-cxx.sh
Delete:
include/callback.h
include/remote-sim.h
Diffstat (limited to 'include/opcode/mips.h')
-rw-r--r-- | include/opcode/mips.h | 29 |
1 files changed, 28 insertions, 1 deletions
diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 06f5625c3..312a2ac17 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -133,6 +133,16 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ #define OP_SH_CODE19 6 /* 19 bit wait code. */ #define OP_MASK_CODE19 0x7ffff +#define OP_SH_ALN 21 +#define OP_MASK_ALN 0x7 +#define OP_SH_VSEL 21 +#define OP_MASK_VSEL 0x1f + +/* Values in the 'VSEL' field. */ +#define MDMX_FMTSEL_IMM_QH 0x1d +#define MDMX_FMTSEL_IMM_OB 0x1e +#define MDMX_FMTSEL_VEC_QH 0x15 +#define MDMX_FMTSEL_VEC_OB 0x16 /* This structure holds information for a particular instruction. */ @@ -220,13 +230,21 @@ struct mips_opcode "f" 32 bit floating point constant "l" 32 bit floating point constant in .lit4 + MDMX instruction operands (note that while these use the FP register + fields, they accept both $fN and $vN names for the registers): + "O" MDMX alignment offset (OP_*_ALN) + "Q" MDMX vector/scalar/immediate source (OP_*_VSEL and OP_*_FT) + "X" MDMX destination register (OP_*_FD) + "Y" MDMX source register (OP_*_FS) + "Z" MDMX source register (OP_*_FT) + Other: "()" parens surrounding optional value "," separates operands Characters used so far, for quick reference when adding more: "<>()," - "ABCDEFGHIJLMNPRSTUVW" + "ABCDEFGHIJLMNOPQRSTUVWXYZ" "abcdfhijklopqrstuvwxz" */ @@ -297,6 +315,10 @@ struct mips_opcode #define INSN_MULT 0x40000000 /* Instruction synchronize shared memory. */ #define INSN_SYNC 0x80000000 +/* Instruction reads MDMX accumulator. XXX FIXME: No bits left! */ +#define INSN_READ_MDMX_ACC 0 +/* Instruction writes MDMX accumulator. XXX FIXME: No bits left! */ +#define INSN_WRITE_MDMX_ACC 0 /* Instruction is actually a macro. It should be ignored by the disassembler, and requires special treatment by the assembler. */ @@ -317,9 +339,14 @@ struct mips_opcode #define INSN_ISA64 0x00000400 /* Masks used for MIPS-defined ASEs. */ +#define INSN_ASE_MASK 0x0000f000 +/* MIPS 16 ASE */ +#define INSN_MIPS16 0x00002000 /* MIPS-3D ASE */ #define INSN_MIPS3D 0x00004000 +/* MDMX ASE */ +#define INSN_MDMX 0x00008000 /* Chip specific instructions. These are bitmasks. */ |