summaryrefslogtreecommitdiffstats
path: root/include/opcode
diff options
context:
space:
mode:
authorcvs2svn <>2003-04-19 00:19:41 +0000
committercvs2svn <>2003-04-19 00:19:41 +0000
commitcd4993ccbb652517e41c35c020bc7f737cac8ec3 (patch)
tree081f4b3f954f5d84bd2bb8822746455812b75c67 /include/opcode
parent44c1c61b1dfc6e5813a7495e3f8c3ccab93e90de (diff)
downloadcygnal-cd4993ccbb652517e41c35c020bc7f737cac8ec3.tar.gz
cygnal-cd4993ccbb652517e41c35c020bc7f737cac8ec3.tar.bz2
cygnal-cd4993ccbb652517e41c35c020bc7f737cac8ec3.zip
This commit was manufactured by cvs2svn to create branchkettenis_i386newframe-20030419-branchpoint
'kettenis_i386newframe-20030419-branch'. Sprout from kettenis_i386newframe-20030406-branch 2003-04-04 08:15:16 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch' Cherrypick from master 2003-04-19 00:19:40 UTC DJ Delorie <dj@redhat.com> '* Makefile.tpl (MAKEINFOFLAGS): Default to --split-size=5000000.': ChangeLog Makefile.in Makefile.tpl configure configure.in include/coff/ChangeLog include/coff/h8300.h include/coff/h8500.h include/coff/sh.h include/elf/ChangeLog include/elf/common.h include/opcode/ChangeLog include/opcode/h8300.h include/opcode/mips.h libtool.m4
Diffstat (limited to 'include/opcode')
-rw-r--r--include/opcode/ChangeLog8
-rw-r--r--include/opcode/h8300.h8
-rw-r--r--include/opcode/mips.h2
3 files changed, 13 insertions, 5 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 35c97a68f..8080909db 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,11 @@
+2003-04-07 Michael Snyder <msnyder@redhat.com>
+
+ * h8300.h (ldc/stc): Fix up src/dst swaps.
+
+2003-04-09 J. Grant <jg-binutils@jguk.org>
+
+ * mips.h: Correct comment typo.
+
2003-03-21 Martin Schwidefsky <schwidefsky@de.ibm.com>
* s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.
diff --git a/include/opcode/h8300.h b/include/opcode/h8300.h
index bdba34567..02f415be8 100644
--- a/include/opcode/h8300.h
+++ b/include/opcode/h8300.h
@@ -436,7 +436,7 @@ const struct h8_opcode h8_opcodes[] =
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_16,CCR|DST,E}},{{PREFIXLDC,0x6,0xF,B30|DISPREG,0,DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP,
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_32,CCR|DST,E}},{{PREFIXLDC,0x7,0x8,B30|DISPREG,0,0x6,0xB,0x2,0x0,SRC|DISP32LIST,E}}EOP,
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSINC,CCR|DST,E}}, {{PREFIXLDC,0x6,0xD,B30|RSINC,0x0,E}}EOP,
- NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSIND,CCR|DST,E}}, {{PREFIXLDC,0x6,0x9,B30|RDIND,0x0,E}} EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSIND,CCR|DST,E}}, {{PREFIXLDC,0x6,0x9,B30|RSIND,0x0,E}} EOP,
NEW_SOP(O(O_LDC,SB),1,2,"ldc"),{{IMM8,EXR|DST,E}}, {{ 0x0,0x1,0x4,0x1,0x0,0x7,IMM8,IGNORE,E,0,0,0,0}}EOP,
NEW_SOP(O(O_LDC,SB),1,2,"ldc"),{{OR8,EXR|DST,E}}, {{ 0x0,0x3,0x1,OR8,E,0,0,0,0}}EOP,
@@ -445,7 +445,7 @@ const struct h8_opcode h8_opcodes[] =
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_16,EXR|DST,E}},{{ 0x0,0x1,0x4,0x1,0x6,0xf,B30|DISPREG,0,DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP,
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_32,EXR|DST,E}},{{ 0x0,0x1,0x4,0x1,0x7,0x8,B30|DISPREG,0,0x6,0xB,0x2,0x0,SRC|DISP32LIST,E}}EOP,
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSINC,EXR|DST,E}}, {{ 0x0,0x1,0x4,0x1,0x6,0xd,B30|RSINC,0x0,E}}EOP,
- NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSIND,EXR|DST,E}}, {{ 0x0,0x1,0x4,0x1,0x6,0x9,B30|RDIND,0x0,E}} EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSIND,EXR|DST,E}}, {{ 0x0,0x1,0x4,0x1,0x6,0x9,B30|RSIND,0x0,E}} EOP,
SOP(O(O_MOV_TO_REG,SB),4,"mov.b"),{{ABS|SRC|L_16|MEMRELAX,RD8,E}}, {{ 0x6,0xA,0x0,RD8,SRC|ABS|MEMRELAX|A16LIST,E}}EOP,
SOP(O(O_MOV_TO_REG,SB),6,"mov.b"),{{ABS|SRC|L_32|MEMRELAX,RD8,E }}, {{ 0x6,0xA,0x2,RD8,SRC|ABS|MEMRELAX|A32LIST,E }}EOP,
@@ -556,7 +556,7 @@ const struct h8_opcode h8_opcodes[] =
NEW_SOP(O(O_STC,SB), 1,2,"stc"),{{CCR|SRC,RD8,E}},{{ 0x0,0x2,0x0,RD8,E,0,0,0,0}} EOP,
- NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,RSIND,E}}, {{PREFIXLDC,0x6,0x9,B31|RDIND,0x0,E}} EOP,
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,RDIND,E}}, {{PREFIXLDC,0x6,0x9,B31|RDIND,0x0,E}} EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,DISP|DST|L_16,E}},{{PREFIXLDC,0x6,0xF,B31|DISPREG,0,DST|DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,DISP|DST|L_32,E}},{{PREFIXLDC,0x7,0x8,B30|DISPREG,0,0x6,0xB,0xA,0x0,DST|DISP32LIST,E}}EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,RDDEC,E}}, {{PREFIXLDC,0x6,0xD,B31|RDDEC,0x0,E}}EOP,
@@ -566,7 +566,7 @@ const struct h8_opcode h8_opcodes[] =
NEW_SOP(O(O_STC,SB), 1,2,"stc"),{{EXR|SRC,RD8,E}},{{ 0x0,0x2,0x1,RD8,E,0,0,0,0}} EOP,
- NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,RSIND,E}}, {{0x0,0x1,0x4,0x1,0x6,0x9,B31|RDIND,0x0,E}} EOP,
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,RDIND,E}}, {{0x0,0x1,0x4,0x1,0x6,0x9,B31|RDIND,0x0,E}} EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,DISP|DST|L_16,E}},{{0x0,0x1,0x4,0x1,0x6,0xF,B31|DISPREG,0,DST|DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,DISP|DST|L_32,E}},{{0x0,0x1,0x4,0x1,0x7,0x8,B30|DISPREG,0,0x6,0xB,0xA,0x0,DST|DISP32LIST,E}}EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,RDDEC,E}}, {{0x0,0x1,0x4,0x1,0x6,0xD,B31|RDDEC,0x0,E}}EOP,
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index 1f90cfd76..476c8e311 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -197,7 +197,7 @@ struct mips_opcode
unsigned long membership;
};
-/* These are the characters which may appears in the args field of an
+/* These are the characters which may appear in the args field of an
instruction. They appear in the order in which the fields appear
when the instruction is used. Commas and parentheses in the args
string are ignored when assembling, and written into the output