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author | Jeff Johnston <jjohnstn@redhat.com> | 2015-05-26 15:23:39 -0400 |
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committer | Corinna Vinschen <corinna@vinschen.de> | 2015-05-27 13:30:20 +0200 |
commit | b46d3b55368878227752b040cd731ba95c02fe85 (patch) | |
tree | 25c9d5d9df4676a7726d77125503b6d71c9ea3fb /libgloss | |
parent | a6342974b0904d0c7a390e7623661ea254e3984f (diff) | |
download | cygnal-b46d3b55368878227752b040cd731ba95c02fe85.tar.gz cygnal-b46d3b55368878227752b040cd731ba95c02fe85.tar.bz2 cygnal-b46d3b55368878227752b040cd731ba95c02fe85.zip |
Store entire context for or1k
- Store the exception program counter (from EPCR) and exception status
register (from ESR) also during the exception. A runtime system may
replace them thereby to implement a thread switch.
* or1k/exception-asm.S: Store missing state
Diffstat (limited to 'libgloss')
-rw-r--r-- | libgloss/ChangeLog | 4 | ||||
-rw-r--r-- | libgloss/or1k/exceptions-asm.S | 10 |
2 files changed, 14 insertions, 0 deletions
diff --git a/libgloss/ChangeLog b/libgloss/ChangeLog index adda15512..1dc57b6a5 100644 --- a/libgloss/ChangeLog +++ b/libgloss/ChangeLog @@ -1,5 +1,9 @@ 2015-05-26 Stefan Wallentowitz <stefan.wallentowitz@tum.de> + * or1k/exception-asm.S: Store missing state + +2015-05-26 Stefan Wallentowitz <stefan.wallentowitz@tum.de> + * or1k/crt0.S: Fix exception stack frame * or1k/exception-asm.S: ditto diff --git a/libgloss/or1k/exceptions-asm.S b/libgloss/or1k/exceptions-asm.S index 762a509a9..91a2d8972 100644 --- a/libgloss/or1k/exceptions-asm.S +++ b/libgloss/or1k/exceptions-asm.S @@ -73,6 +73,10 @@ _or1k_exception_handler: l.sw GPR_BUF_OFFSET(29)(r1),r29 l.sw GPR_BUF_OFFSET(30)(r1),r30 l.sw GPR_BUF_OFFSET(31)(r1),r31 + l.mfspr r14,r0,OR1K_SPR_SYS_EPCR_BASE + l.sw 0x80(r1),r14 + l.mfspr r14,r0,OR1K_SPR_SYS_ESR_BASE + l.sw 0x84(r1),r14 /* Replace impure pointer for exception */ l.movhi r20,hi(_or1k_exception_impure_ptr) @@ -156,6 +160,12 @@ _or1k_exception_handler: l.sw 0(r21),r20 /* Restore state */ + l.lwz r2,0x80(r1) + l.mtspr r0,r2,OR1K_SPR_SYS_EPCR_BASE + + l.lwz r2,0x84(r1) + l.mtspr r0,r2,OR1K_SPR_SYS_ESR_BASE + l.lwz r2,GPR_BUF_OFFSET(2)(r1) l.lwz r3,GPR_BUF_OFFSET(3)(r1) l.lwz r4,GPR_BUF_OFFSET(4)(r1) |