diff options
Diffstat (limited to 'include/opcode')
| -rw-r--r-- | include/opcode/ChangeLog | 25 | ||||
| -rw-r--r-- | include/opcode/a29k.h | 10 | ||||
| -rw-r--r-- | include/opcode/convex.h | 62 | ||||
| -rw-r--r-- | include/opcode/dlx.h | 2 | ||||
| -rw-r--r-- | include/opcode/i386.h | 8 | ||||
| -rw-r--r-- | include/opcode/mips.h | 29 | ||||
| -rw-r--r-- | include/opcode/or32.h | 4 |
7 files changed, 90 insertions, 50 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 100c886a7..385b19152 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,28 @@ +2002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * mips.h (INSN_MIPS16): New define. + +2002-07-08 Alan Modra <amodra@bigpond.net.au> + + * i386.h: Remove IgnoreSize from movsx and movzx. + +2002-06-08 Alan Modra <amodra@bigpond.net.au> + + * a29k.h: Replace CONST with const. + (CONST): Don't define. + * convex.h: Replace CONST with const. + (CONST): Don't define. + * dlx.h: Replace CONST with const. + * or32.h (CONST): Don't define. + +2002-05-30 Chris G. Demetriou <cgd@broadcom.com> + + * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL) + (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH) + (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC) + (INSN_MDMX): New constants, for MDMX support. + (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX. + 2002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net> * dlx.h: New file. diff --git a/include/opcode/a29k.h b/include/opcode/a29k.h index 399be67ca..c6c8c3700 100644 --- a/include/opcode/a29k.h +++ b/include/opcode/a29k.h @@ -1,5 +1,5 @@ /* Table of opcodes for the AMD 29000 family. - Copyright 1990, 1991, 1993, 1994 Free Software Foundation, Inc. + Copyright 1990, 1991, 1993, 1994, 2002 Free Software Foundation, Inc. This file is part of GDB and GAS. @@ -62,11 +62,7 @@ struct a29k_opcode { char *args; }; -#ifndef CONST -#define CONST -#endif /* CONST */ - -static CONST struct a29k_opcode a29k_opcodes[] = +static const struct a29k_opcode a29k_opcodes[] = { { "add", 0x14000000, "c,a,b" }, @@ -282,4 +278,4 @@ static CONST struct a29k_opcode a29k_opcodes[] = if we've run off the end of the table. */ }; -CONST unsigned int num_opcodes = (((sizeof a29k_opcodes) / (sizeof a29k_opcodes[0])) - 1); +const unsigned int num_opcodes = (((sizeof a29k_opcodes) / (sizeof a29k_opcodes[0])) - 1); diff --git a/include/opcode/convex.h b/include/opcode/convex.h index 780b12d48..ccf556829 100644 --- a/include/opcode/convex.h +++ b/include/opcode/convex.h @@ -1,5 +1,5 @@ /* Information for instruction disassembly on the Convex. - Copyright 1989, 1993 Free Software Foundation, Inc. + Copyright 1989, 1993, 2002 Free Software Foundation, Inc. This file is part of GDB. @@ -17,10 +17,6 @@ You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#ifndef CONST -#define CONST -#endif /* CONST */ - #define xxx 0 #define rrr 1 #define rr 2 @@ -67,7 +63,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #define CPUID 20 #define TID 21 -CONST char *op[] = { +const char *op[] = { "", "v0\0v1\0v2\0v3\0v4\0v5\0v6\0v7", "s0\0s1\0s2\0s3\0s4\0s5\0s6\0s7", @@ -92,7 +88,7 @@ CONST char *op[] = { "tid", }; -CONST struct formstr format0[] = { +const struct formstr format0[] = { {0,0,rrr,V,S,S}, /* mov */ {0,0,rrr,S,S,V}, /* mov */ {1,1,rrr,V,V,V}, /* merg.t */ @@ -159,7 +155,7 @@ CONST struct formstr format0[] = { {4,8,rrr,V,S,V}, /* div.l */ }; -CONST struct formstr format1[] = { +const struct formstr format1[] = { {11,0,xxx,0,0,0}, /* exit */ {12,0,a3,0,0,0}, /* jmp */ {13,2,a3,0,0,0}, /* jmpi.f */ @@ -226,7 +222,7 @@ CONST struct formstr format1[] = { {21,8,a2r,V,0,0}, /* st.l */ }; -CONST struct formstr format2[] = { +const struct formstr format2[] = { {28,5,rr,A,A,0}, /* cvtw.b */ {28,6,rr,A,A,0}, /* cvtw.h */ {29,7,rr,A,A,0}, /* cvtb.w */ @@ -357,7 +353,7 @@ CONST struct formstr format2[] = { {4,8,rr,S,S,0}, /* div.l */ }; -CONST struct formstr format3[] = { +const struct formstr format3[] = { {32,3,rr,V,V,0}, /* cvtd.s */ {31,4,rr,V,V,0}, /* cvts.d */ {33,4,rr,V,V,0}, /* cvtl.d */ @@ -424,7 +420,7 @@ CONST struct formstr format3[] = { {43,8,rr,S,S,0}, /* neg.l */ }; -CONST struct formstr format4[] = { +const struct formstr format4[] = { {46,0,nops,0,0,0}, /* nop */ {47,0,pcrel,0,0,0}, /* br */ {48,2,pcrel,0,0,0}, /* bri.f */ @@ -435,7 +431,7 @@ CONST struct formstr format4[] = { {50,1,pcrel,0,0,0}, /* brs.t */ }; -CONST struct formstr format5[] = { +const struct formstr format5[] = { {51,5,rr,V,V,0}, /* ldvi.b */ {51,6,rr,V,V,0}, /* ldvi.h */ {51,7,rr,V,V,0}, /* ldvi.w */ @@ -454,7 +450,7 @@ CONST struct formstr format5[] = { {52,8,rxr,S,V,0}, /* stvi.l */ }; -CONST struct formstr format6[] = { +const struct formstr format6[] = { {53,0,r,A,0,0}, /* ldsdr */ {54,0,r,A,0,0}, /* ldkdr */ {55,3,r,S,0,0}, /* ln.s */ @@ -521,7 +517,7 @@ CONST struct formstr format6[] = { {83,4,r,S,0,0}, /* atan.d */ }; -CONST struct formstr format7[] = { +const struct formstr format7[] = { {84,5,r,V,0,0}, /* sum.b */ {84,6,r,V,0,0}, /* sum.h */ {84,7,r,V,0,0}, /* sum.w */ @@ -556,11 +552,11 @@ CONST struct formstr format7[] = { {0,0,0,0,0,0}, }; -CONST struct formstr formatx[] = { +const struct formstr formatx[] = { {0,0,0,0,0,0}, }; -CONST struct formstr format1a[] = { +const struct formstr format1a[] = { {91,0,imr,A,0,0}, /* halt */ {92,0,a4,0,0,0}, /* sysc */ {18,6,imr,A,0,0}, /* ld.h */ @@ -595,7 +591,7 @@ CONST struct formstr format1a[] = { {41,7,imr,A,0,0}, /* lt.w */ }; -CONST struct formstr format1b[] = { +const struct formstr format1b[] = { {18,4,imr,S,0,0}, /* ld.d */ {18,10,imr,S,0,0}, /* ld.u */ {18,8,imr,S,0,0}, /* ld.l */ @@ -630,7 +626,7 @@ CONST struct formstr format1b[] = { {41,7,imr,S,0,0}, /* lt.w */ }; -CONST struct formstr e0_format0[] = { +const struct formstr e0_format0[] = { {10,3,rrr,S,V,V}, /* sub.s */ {10,4,rrr,S,V,V}, /* sub.d */ {4,3,rrr,S,V,V}, /* div.s */ @@ -697,7 +693,7 @@ CONST struct formstr e0_format0[] = { {4,16,rrr,V,S,V}, /* div.l.f */ }; -CONST struct formstr e0_format1[] = { +const struct formstr e0_format1[] = { {0,0,0,0,0,0}, {94,0,a3,0,0,0}, /* tst */ {95,0,a3,0,0,0}, /* lck */ @@ -764,7 +760,7 @@ CONST struct formstr e0_format1[] = { {21,16,a2r,V,0,0}, /* st.l.f */ }; -CONST struct formstr e0_format2[] = { +const struct formstr e0_format2[] = { {28,5,rr,V,V,0}, /* cvtw.b */ {28,6,rr,V,V,0}, /* cvtw.h */ {29,7,rr,V,V,0}, /* cvtb.w */ @@ -895,7 +891,7 @@ CONST struct formstr e0_format2[] = { {0,0,0,0,0,0}, }; -CONST struct formstr e0_format3[] = { +const struct formstr e0_format3[] = { {32,11,rr,V,V,0}, /* cvtd.s.f */ {31,12,rr,V,V,0}, /* cvts.d.f */ {33,12,rr,V,V,0}, /* cvtl.d.f */ @@ -962,7 +958,7 @@ CONST struct formstr e0_format3[] = { {0,0,0,0,0,0}, }; -CONST struct formstr e0_format4[] = { +const struct formstr e0_format4[] = { {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, @@ -973,7 +969,7 @@ CONST struct formstr e0_format4[] = { {0,0,0,0,0,0}, }; -CONST struct formstr e0_format5[] = { +const struct formstr e0_format5[] = { {51,13,rr,V,V,0}, /* ldvi.b.f */ {51,14,rr,V,V,0}, /* ldvi.h.f */ {51,15,rr,V,V,0}, /* ldvi.w.f */ @@ -992,7 +988,7 @@ CONST struct formstr e0_format5[] = { {52,16,rxr,S,V,0}, /* stvi.l.f */ }; -CONST struct formstr e0_format6[] = { +const struct formstr e0_format6[] = { {0,0,rxl,S,CIR,0}, /* mov */ {0,0,lr,CIR,S,0}, /* mov */ {0,0,lr,TOC,S,0}, /* mov */ @@ -1059,7 +1055,7 @@ CONST struct formstr e0_format6[] = { {0,0,0,0,0,0}, }; -CONST struct formstr e0_format7[] = { +const struct formstr e0_format7[] = { {84,13,r,V,0,0}, /* sum.b.f */ {84,14,r,V,0,0}, /* sum.h.f */ {84,15,r,V,0,0}, /* sum.w.f */ @@ -1094,7 +1090,7 @@ CONST struct formstr e0_format7[] = { {0,0,0,0,0,0}, }; -CONST struct formstr e1_format0[] = { +const struct formstr e1_format0[] = { {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, @@ -1161,7 +1157,7 @@ CONST struct formstr e1_format0[] = { {4,23,rrr,V,S,V}, /* div.l.t */ }; -CONST struct formstr e1_format1[] = { +const struct formstr e1_format1[] = { {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, @@ -1228,7 +1224,7 @@ CONST struct formstr e1_format1[] = { {21,23,a2r,V,0,0}, /* st.l.t */ }; -CONST struct formstr e1_format2[] = { +const struct formstr e1_format2[] = { {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, @@ -1359,7 +1355,7 @@ CONST struct formstr e1_format2[] = { {0,0,0,0,0,0}, }; -CONST struct formstr e1_format3[] = { +const struct formstr e1_format3[] = { {32,18,rr,V,V,0}, /* cvtd.s.t */ {31,19,rr,V,V,0}, /* cvts.d.t */ {33,19,rr,V,V,0}, /* cvtl.d.t */ @@ -1426,7 +1422,7 @@ CONST struct formstr e1_format3[] = { {0,0,0,0,0,0}, }; -CONST struct formstr e1_format4[] = { +const struct formstr e1_format4[] = { {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, @@ -1437,7 +1433,7 @@ CONST struct formstr e1_format4[] = { {0,0,0,0,0,0}, }; -CONST struct formstr e1_format5[] = { +const struct formstr e1_format5[] = { {51,20,rr,V,V,0}, /* ldvi.b.t */ {51,21,rr,V,V,0}, /* ldvi.h.t */ {51,22,rr,V,V,0}, /* ldvi.w.t */ @@ -1456,7 +1452,7 @@ CONST struct formstr e1_format5[] = { {52,23,rxr,S,V,0}, /* stvi.l.t */ }; -CONST struct formstr e1_format6[] = { +const struct formstr e1_format6[] = { {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, @@ -1523,7 +1519,7 @@ CONST struct formstr e1_format6[] = { {0,0,0,0,0,0}, }; -CONST struct formstr e1_format7[] = { +const struct formstr e1_format7[] = { {84,20,r,V,0,0}, /* sum.b.t */ {84,21,r,V,0,0}, /* sum.h.t */ {84,22,r,V,0,0}, /* sum.w.t */ diff --git a/include/opcode/dlx.h b/include/opcode/dlx.h index 23e3b00bc..e1b249f85 100644 --- a/include/opcode/dlx.h +++ b/include/opcode/dlx.h @@ -163,7 +163,7 @@ struct dlx_opcode char *args; }; -static CONST struct dlx_opcode dlx_opcodes[] = +static const struct dlx_opcode dlx_opcodes[] = { /* Arithmetic and Logic R-TYPE instructions. */ { "nop", (ALUOP|NOPF), "N" }, /* NOP */ diff --git a/include/opcode/i386.h b/include/opcode/i386.h index 0171f62ed..71c204c81 100644 --- a/include/opcode/i386.h +++ b/include/opcode/i386.h @@ -121,9 +121,9 @@ static const template i386_optab[] = { {"movslq", 2, 0x63, X, Cpu64, NoSuf|Modrm|Rex64, { Reg32|WordMem, Reg64, 0} }, /* Intel Syntax next 5 insns */ {"movsx", 2, 0x0fbe, X, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, WordReg, 0} }, -{"movsx", 2, 0x0fbf, X, Cpu386, w_Suf|Modrm|IgnoreSize, { Reg16|ShortMem, Reg32, 0} }, +{"movsx", 2, 0x0fbf, X, Cpu386, w_Suf|Modrm, { Reg16|ShortMem, Reg32, 0} }, {"movsx", 2, 0x0fbe, X, Cpu64, b_Suf|Modrm|Rex64, { Reg8|ByteMem, Reg64, 0} }, -{"movsx", 2, 0x0fbf, X, Cpu64, w_Suf|Modrm|IgnoreSize|Rex64, { Reg16|ShortMem, Reg64, 0} }, +{"movsx", 2, 0x0fbf, X, Cpu64, w_Suf|Modrm|Rex64, { Reg16|ShortMem, Reg64, 0} }, {"movsx", 2, 0x63, X, Cpu64, l_Suf|Modrm|Rex64, { Reg32|WordMem, Reg64, 0} }, /* Move with zero extend. */ @@ -135,11 +135,11 @@ static const template i386_optab[] = { {"movzwq", 2, 0x0fb7, X, Cpu64, NoSuf|Modrm|Rex64, { Reg16|ShortMem, Reg64, 0} }, /* Intel Syntax next 4 insns */ {"movzx", 2, 0x0fb6, X, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, WordReg, 0} }, -{"movzx", 2, 0x0fb7, X, Cpu386, w_Suf|Modrm|IgnoreSize, { Reg16|ShortMem, Reg32, 0} }, +{"movzx", 2, 0x0fb7, X, Cpu386, w_Suf|Modrm, { Reg16|ShortMem, Reg32, 0} }, /* These instructions are not particulary usefull, since the zero extend 32->64 is implicit, but we can encode them. */ {"movzx", 2, 0x0fb6, X, Cpu386, b_Suf|Modrm|Rex64, { Reg8|ByteMem, Reg64, 0} }, -{"movzx", 2, 0x0fb7, X, Cpu386, w_Suf|Modrm|IgnoreSize|Rex64, { Reg16|ShortMem, Reg64, 0} }, +{"movzx", 2, 0x0fb7, X, Cpu386, w_Suf|Modrm|Rex64, { Reg16|ShortMem, Reg64, 0} }, /* Push instructions. */ {"push", 1, 0x50, X, CpuNo64, wl_Suf|ShortForm|DefaultSize, { WordReg, 0, 0 } }, diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 06f5625c3..312a2ac17 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -133,6 +133,16 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ #define OP_SH_CODE19 6 /* 19 bit wait code. */ #define OP_MASK_CODE19 0x7ffff +#define OP_SH_ALN 21 +#define OP_MASK_ALN 0x7 +#define OP_SH_VSEL 21 +#define OP_MASK_VSEL 0x1f + +/* Values in the 'VSEL' field. */ +#define MDMX_FMTSEL_IMM_QH 0x1d +#define MDMX_FMTSEL_IMM_OB 0x1e +#define MDMX_FMTSEL_VEC_QH 0x15 +#define MDMX_FMTSEL_VEC_OB 0x16 /* This structure holds information for a particular instruction. */ @@ -220,13 +230,21 @@ struct mips_opcode "f" 32 bit floating point constant "l" 32 bit floating point constant in .lit4 + MDMX instruction operands (note that while these use the FP register + fields, they accept both $fN and $vN names for the registers): + "O" MDMX alignment offset (OP_*_ALN) + "Q" MDMX vector/scalar/immediate source (OP_*_VSEL and OP_*_FT) + "X" MDMX destination register (OP_*_FD) + "Y" MDMX source register (OP_*_FS) + "Z" MDMX source register (OP_*_FT) + Other: "()" parens surrounding optional value "," separates operands Characters used so far, for quick reference when adding more: "<>()," - "ABCDEFGHIJLMNPRSTUVW" + "ABCDEFGHIJLMNOPQRSTUVWXYZ" "abcdfhijklopqrstuvwxz" */ @@ -297,6 +315,10 @@ struct mips_opcode #define INSN_MULT 0x40000000 /* Instruction synchronize shared memory. */ #define INSN_SYNC 0x80000000 +/* Instruction reads MDMX accumulator. XXX FIXME: No bits left! */ +#define INSN_READ_MDMX_ACC 0 +/* Instruction writes MDMX accumulator. XXX FIXME: No bits left! */ +#define INSN_WRITE_MDMX_ACC 0 /* Instruction is actually a macro. It should be ignored by the disassembler, and requires special treatment by the assembler. */ @@ -317,9 +339,14 @@ struct mips_opcode #define INSN_ISA64 0x00000400 /* Masks used for MIPS-defined ASEs. */ +#define INSN_ASE_MASK 0x0000f000 +/* MIPS 16 ASE */ +#define INSN_MIPS16 0x00002000 /* MIPS-3D ASE */ #define INSN_MIPS3D 0x00004000 +/* MDMX ASE */ +#define INSN_MDMX 0x00008000 /* Chip specific instructions. These are bitmasks. */ diff --git a/include/opcode/or32.h b/include/opcode/or32.h index 05c532667..4609a48db 100644 --- a/include/opcode/or32.h +++ b/include/opcode/or32.h @@ -31,10 +31,6 @@ #define PARAMS(x) x #endif -#ifndef CONST -#define CONST const -#endif - #define MAX_GPRS 32 #define PAGE_SIZE 4096 #undef __HALF_WORD_INSN__ |