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* cygwin32 -> cygwin.Christopher Faylor2000-02-211-0/+4
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* cygwin32 -> cygwinChristopher Faylor2000-02-211-1/+1
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* Update.Christopher Faylor2000-02-212-0/+42
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* * environ.cc (getwinenv): Make __stdcall.Christopher Faylor2000-02-214-17/+41
| | | | | | | (winenv): Ditto. * malloc.cc (strdup): New function. Occludes newlib version. (_strdup_r): Ditto. * winsup.h: Reflect above __stdcall changes.
* Give Corinna some more files.Christopher Faylor2000-02-211-2/+7
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* *** empty log message ***Corinna Vinschen2000-02-212-0/+9
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* *** empty log message ***Corinna Vinschen2000-02-211-0/+2
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* import newlib-2000-02-17 snapshotChristopher Faylor2000-02-171520-0/+282219
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* import winsup-2000-02-17 snapshotChristopher Faylor2000-02-17582-0/+146593
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* import winsup-2000-02-17 snapshotChristopher Faylor2000-02-1731-0/+6439
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* bfd:Joern Rennecke2000-02-172-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
* Add prototypes for ARM register name functions.Nick Clifton2000-02-162-0/+7
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* wait.h was replaced by gdb/gdb_wait.h.Andrew Cagney2000-02-102-63/+4
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* (sim_resume): Clarify use of SIGGNAL.Andrew Cagney2000-02-092-7/+32
| | | | (sim_stop_reason): Clarify meaning of sim_signalled.
* Reinstate the following lost patches:Jeff Law2000-02-082-4/+18
| | | | | | | | | | | | | Wed Dec 15 11:22:56 1999 Jeffrey A Law (law@cygnus.com) * hp-symtab.h (HP_LANGUAGE_FORTRAN): New enumeration constant. (HP_LANGUAGE_F77): Define using HP_LANGUAGE_FORTRAN. 1999-11-04 Jimmy Guo <guo@cup.hp.com> * hp-symtab.h (dntt_type_fparam): Add doc_ranges, misc_kind fields, change location type to CORE_ADDR from int. (dntt_type_const): Name the 5th field location_type.
* 2000-02-06 Jason Molenda (jsm@bugshack.cygnus.com)Jason Molenda2000-02-072-3/+3
| | | | | * ChangeLog: Whitespace change to test logging. * bfd/ChangeLog, dejagnu/ChangeLog, include/ChangeLog, tcl/ChangeLog: Same.
* Apply patches to support Insight by hand from insight-2000-02-04 snapshot.Jason Molenda2000-02-073-1/+51
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* Apply H>J's patch to propogate changes made by Thomas de Lellis to arm.hNick Clifton2000-02-032-19/+25
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* octets vs bytes changes for binutilsTim Wall2000-02-032-0/+11
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* Add prototype for parse_arm_diassembler_optionNick Clifton2000-01-282-0/+2
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* Add ATPCS support to ARM disassembler.Nick Clifton2000-01-272-1/+3
| | | | Document ARM disassembler options.
* Add support for documenting target specific disassembler optionsNick Clifton2000-01-272-0/+7
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* Apply Thoams de Lellis's patch to fic disassembly of Thumb instructions whenNick Clifton2000-01-272-11/+18
| | | | bounded by non-function labels.
* fix spelling of MotorolaNick Clifton2000-01-205-5/+10
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* Cosmetic changes to tc-i386.[ch] + extend x86 gas testsuite jmp andAlan Modra2000-01-152-2/+6
| | | | call tests + tweak intel mode far call and jmp.
* fix comments on some EM numbers.Nick Clifton2000-01-132-2/+8
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* Merge in changes from egcs for AIX cross-compilation support.Geoffrey Keating2000-01-124-4/+14
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* Fix mistakes made about interpretation of ELF ABI specNick Clifton2000-01-112-5/+24
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* Add definition of NT_WIN32PSTATUSNick Clifton2000-01-102-0/+5
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* add missing definitionsNick Clifton2000-01-052-14/+57
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* Redefine STO_* value sin terms of STV_* valuesNick Clifton1999-12-282-4/+9
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* Add new constants specified in Oct 4 1999 Draft of ELF ABI specNick Clifton1999-12-282-8/+138
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* x86 indirect jump/call syntax fixes. Disassembly fix for lcall.Alan Modra1999-12-272-2/+10
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* 1999-12-15 Doug Evans <dje@transmeta.com>Ian Lance Taylor1999-12-162-0/+12
| | | | * dis-asm.h: Enclose in extern "C" ifdef __cplusplus.
* Fix include pathsNick Clifton1999-12-094-3/+10
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* *** empty log message ***Jim Blandy1999-12-071-0/+4
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* * common.h (NT_PRXFPREG): New definition.Jim Blandy1999-12-071-0/+2
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* * mn10300.h (E_MN10300_MACH_AM33): Define.Jeff Law1999-12-012-0/+5
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* * mn10300.h: Add new operand types. Add new instruction formats.Jeff Law1999-12-012-0/+27
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* * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"Jeff Law1999-11-252-2/+10
| | | | instruction.
* For include/opcode:Gavin Koch1999-11-182-0/+5
| | | | | | | | | | | * mips.h (INSN_ISA5): New. For opcodes: * mips-opc.c (I5): New. (abs.ps,add.ps,alnv.ps,c.COND.ps,cvt.s.pl,cvt.s.pu,cvt.ps.s madd.ps,movf.ps,movt.ps,mul.ps,net.ps,nmadd.ps,nmsub.ps, pll.ps,plu.ps,pul.ps,puu.ps,sub.ps,suxc1,luxc1): New.
* Add sim-d10v.hMichael Meissner1999-11-112-0/+111
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* For include/opcode:Gavin Koch1999-11-012-0/+22
| | | | | | | | | | | | | * mips.h (OPCODE_IS_MEMBER): New. For gas: * config/tc-mips.c (macro_build): Use OPCODE_IS_MEMBER. (mips_ip): Use OPCODE_IS_MEMBER. For opcodes: * mips-dis.c (_print_insn_mips): Use OPCODE_IS_MEMBER.
* Define SHORT_AR (fix for CR: 101340)Nick Clifton1999-10-292-0/+5
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* Add md expression support; Cleanup alpha warningsMichael Meissner1999-10-182-2/+7
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* * hppa.h (PF_HP_PAGE_SIZE): Define.Jeff Law1999-10-122-0/+14
| | | | | (PF_HP_FAR_SHARED, PF_HP_NEAR_SHARED, PF_HP_CODE): Likewise. (PF_HP_MODIFY, PF_HP_LAZYSWAP, PF_HP_SBP): Likewise.
* * hppa.h (pa_opcodes): Add load and store cache control toJeff Law1999-10-102-75/+123
| | | | | | | | | | instructions. Add ordered access load and store. * hppa.h (pa_opcode): Add new entries for addb and addib. * hppa.h (pa_opcodes): Fix cmpb and cmpib entries. * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
* Added seven new instructions ld, ld2w, sac, sachi, slae, st andDiego Novillo1999-10-072-0/+8
| | | | | st2w for d10v. Created new testsuite for d10v to verify new instructions.
* * m32r.h (E_M32RX_ARCH): Define.Doug Evans1999-10-052-0/+6
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* 1999-09-15 Ulrich Drepper <drepper@cygnus.com>Ulrich Drepper1999-10-042-6/+13
| | | | * hppa.h: Add DT_HP_GST_SIZE, DT_HP_GST_VERSION, and DT_HP_GST_HASHVAL.
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