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gcc:
* config/sh/sh.h (EXTRA_SPECS): Add subtarget_asm_relax_spec and
subtarget_asm_isa_spec.
(SUBTARGET_ASM_RELAX_SPEC, SUBTARGET_ASM_ISA_SPEC): Define.
(ASM_SPEC): Define as SH_ASM_SPEC.
(SH_ASM_SPEC): New; take the role of ASM_SPEC, but safe from svr4.h.
Use subtarget_asm_relax_spec and subtarget_asm_isa_spec.
* config/sh/elf.h (ASM_SPEC): Use SH_ASM_SPEC.
(SUBTARGET_ASM_ISA_SPEC): Undef / define.
gcc/testsuite:
gcc.dg/sh-relax.c: New test.
include/elf:
* sh.h (EF_SH_MERGE_MACH): Make sure SH2E & SH3/SH3E merge to SH3E,
and SH2E & SH4 merge to SH4, not SH2E.
gas:
* config/tc-sh.c (sh_dsp): Replace with preset_target_arch.
(md_begin): Use preset_target_arch.
(md_longopts): Make isa option unconditional.
(md_parse_option): Make OPTION_DSP and OPTION_ISA sh4 / any
set preset_target_arch.
(md_apply_fix3): If BFD_ASSEMBLER, adjust SWITCH_TABLE fixups
by -S_GET_VALUE (fixP->fx_subsy).
(tc_gen_reloc): For SWITCH_TABLE fixups, the symbol is fixp->fx_subsy,
and the addend is 0.
Adjust addend of R_SH_IND12W relocations by fixp->fx_offset - 4.
* config/tc-sh.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define.
bfd:
elf32-sh.c (sh_elf_howto_tab): Make R_SH_IND12W into an ordinary
relocation (no special function), and make it non-partial_inplace.
(sh_elf_relax_section): When creating a bsr, use a consistent value
no matter if the symbol is extern or not; set addend to -4.
Don't swap load / non-load instructions for SH4.
(sh_elf_relax_delete_bytes): In R_SH_IND12W case, check the offset
rather than if the symbol is external to determine if adjusting the
offset makes sense. Adjust the addend too if appropriate.
(sh_elf_relocate_section): In R_SH_IND12W, don't fiddle with the
relocation.
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* sh.h: Split out various bits to bfd/elf32-sh64.h.
include/opcode/ChangeLog
* m68hc11.h (cpu6812s): Define.
bfd/ChangeLog
* elf-bfd.h (struct bfd_elf_section_data): Remove tdata. Change
dynindx to an int. Rearrange for better packing.
* elf.c (_bfd_elf_new_section_hook): Don't alloc if already done.
* elf32-mips.c (bfd_elf32_new_section_hook): Define.
* elf32-sh64.h: New. Split out from include/elf/sh.h.
(struct _sh64_elf_section_data): New struct.
(sh64_elf_section_data): Don't dereference sh64_info (was tdata).
* elf32-sh64-com.c: Include elf32-sh64.h.
* elf32-sh64.c: Likewise.
(sh64_elf_new_section_hook): New function.
(bfd_elf32_new_section_hook): Define.
(sh64_elf_fake_sections): Adjust for sh64_elf_section_data change.
(sh64_bfd_elf_copy_private_section_data): Likewise.
(sh64_elf_final_write_processing): Likewise.
* elf32-sparc.c (struct elf32_sparc_section_data): New.
(elf32_sparc_new_section_hook): New function.
(SET_SEC_DO_RELAX, SEC_DO_RELAX): Delete.
(sec_do_relax): Define.
(elf32_sparc_relax_section): Adjust to use sec_do_relax.
(elf32_sparc_relocate_section): Likewise.
* elf64-mips.c (bfd_elf64_new_section_hook): Define.
* elf64-mmix.c (struct _mmix_elf_section_data): New.
(mmix_elf_section_data): Define. Use throughout file.
(mmix_elf_new_section_hook): New function.
(bfd_elf64_new_section_hook): Define.
* elf64-ppc.c (struct _ppc64_elf_section_data): New.
(ppc64_elf_section_data): Define. Use throughout.
(ppc64_elf_new_section_hook): New function.
(bfd_elf64_new_section_hook): Define.
* elf64-sparc.c (struct sparc64_elf_section_data): New.
(sparc64_elf_new_section_hook): New function.
(SET_SEC_DO_RELAX, SEC_DO_RELAX): Delete.
(sec_do_relax): Define.
(sparc64_elf_relax_section): Adjust to use sec_do_relax.
(sparc64_elf_relocate_section): Likewise.
(bfd_elf64_new_section_hook): Define.
* elfn32-mips.c (bfd_elf32_new_section_hook): Define.
* elfxx-mips.c (struct _mips_elf_section_data): New.
(mips_elf_section_data): Define. Use throughout.
(_bfd_mips_elf_new_section_hook): New function.
(mips_elf_create_got_section): Don't alloc used_by_bfd.
* elfxx-mips.h (_bfd_mips_elf_new_section_hook): Declare.
* elfxx-target.h (bfd_elfNN_new_section_hook): Add #ifndef.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
opcodes/ChangeLog
* sh64-dis.c: Include elf32-sh64.h.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
gas/ChangeLog
* config/tc-sh64.c (shmedia_frob_section_type): Adjust for changed
sh64_elf_section_data.
* config/tc-sh64.h: Include elf32-sh64.h.
* config/tc-m68hc11.c: Don't include stdio.h.
(md_show_usage): Fix missing continuation.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
ld/ChangeLog
* emultempl/sh64elf.em: Include elf32-sh64.h.
(sh64_elf_${EMULATION_NAME}_before_allocation): Adjust for changed
sh64_elf_section_data.
(sh64_elf_${EMULATION_NAME}_after_allocation): Likewise.
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comparisons of bfd_boolean vars with TRUE/FALSE. Formatting.
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* Makefile.am (BFD32_BACKENDS): Add elf32-sh64-com.lo.
(BFD32_BACKENDS_CFILES): Add elf32-sh64-com.c.
(elf32-sh64-com.lo): New dependency list.
* Makefile.in: Regenerate.
* configure.in (bfd_elf32_sh64_vec, bfd_elf32_sh64l_vec)
(bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec): Add
elf32-sh64-com.lo.
* configure: Regenerate.
* elf32-sh64.c (sh64_address_in_cranges)
(sh64_get_contents_type, sh64_address_is_shmedia): Move to...
(crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb):
(crange_bsearch_cmpl): Prepend _bfd_sh64_ to name and move to...
* elf32-sh64-com.c: ...here. New file.
include/elf/
* sh.h (_bfd_sh64_crange_qsort_cmpb, _bfd_sh64_crange_qsort_cmpl)
(_bfd_sh64_crange_bsearch_cmpb, _bfd_sh64_crange_bsearch_cmpl): New
prototypes.
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2002-01-23 Alexandre Oliva <aoliva@redhat.com>
* sh.h (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16,
R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16,
R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16,
R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16,
R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16,
R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16,
R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16,
R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8,
R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64,
R_SH_RELATIVE64): New relocs.
(R_SH_FIRST_INVALID_RELOC_4): Adjust.
2001-05-16 Alexandre Oliva <aoliva@redhat.com>
* sh.h: Renumbered and renamed some SH5 relocations to match
official numbers and names; moved unmaching ones to the range
0xf2-0xff.
2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com>
* sh.h (sh64_get_contents_type): Declare.
(sh64_address_is_shmedia): Likewise.
2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com>
* sh.h (sh64_elf_crange): New type.
(struct sh64_section_data): New.
(sh64_elf_section_data): New macro.
(EF_SH5): Rename back from EF_SH64.
2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com>
* sh.h (SHF_SH5_ISA32_MIXED, SHT_SH5_CR_SORTED,
SH64_CRANGES_SECTION_NAME, SH64_CRANGE_SIZE,
SH64_CRANGE_CR_ADDR_OFFSET, SH64_CRANGE_CR_SIZE_OFFSET,
SH64_CRANGE_CR_TYPE_OFFSET): New macros.
2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com>
* sh.h (EF_SH64): Don't define EF_SH64_ABI64.
2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com>
* sh.h (EF_SH64_32BIT_ABI, EF_SH64_64BIT_ABI): Delete.
(EF_SH64_ABI64): New.
2000-11-23 Hans-Peter Nilsson <hpn@cygnus.com>
* sh.h (EF_SH64): Rename from EF_SH5.
(EF_SH64_32BIT_ABI): New.
(EF_SH64_64BIT_ABI): New.
(R_SH_PT_16, R_SH_SHMEDIA_CODE
R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2,
R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16,
R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16,
R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL,
R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL): New
relocs.
2000-09-01 Ben Elliston <bje@redhat.com>
* sh.h (EF_SH5): Define.
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R_SH_JMP_SLOT, R_SH_RELATIVE, R_SH_GOTOFF, R_SH_GOTPC): Change
numbers to the range from 160 to 167.
(R_SH_FIRST_INVALID_RELOC): Adjust.
(R_SH_FIRST_INVALID_RELOC_2, R_SH_LAST_INVALID_RELOC_2):
New relocs to fill in the gap.
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R_SH_JMP_SLOT, R_SH_RELATIVE, R_SH_GOTOFF, R_SH_GOTPC): New relocs.
(R_SH_FIRST_INVALID_RELOC): Adjust.
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Remove duplicate reloc enums in elf32-d[13]0v.c
Remove EMPTY_HOWTOs in elf32-i386.c
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opcodes:
* sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
(sh_arg_type): Add A_PC.
(sh_table): Update entries using immediates. Add repeat.
* sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
gas:
* config/tc-sh.c (immediate): Delete.
(sh_operand_info): Add immediate member.
(parse_reg): Use A_PC for pc.
(parse_exp): Add second argument 'op'. All callers changed.
(parse_at): Expect pc to be coded as A_PC.
Use immediate field in *op.
(insert): Add fourth argument 'op'. All callers changed.
(build_relax): Add second argument 'op'. All callers changed.
(insert_loop_bounds): New function.
(build_Mytes): Remove DISP_4.
Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
(assemble_ppi): Use immediate field in *operand.
(sh_force_relocation): Handle BFD_RELOC_SH_LOOP_{START,END}.
(md_apply_fix): Likewise.
(tc_gen_reloc): Likewise. Check for a pcrel BFD_RELOC_SH_LABEL.
include/coff:
* sh.h (R_SH_LOOP_START, R_SH_LOOP_END): Define.
include/elf:
* sh.h (R_SH_LOOP_START, R_SH_LOOP_END): New RELOC_NUMBERs.
bfd:
* reloc.c (_bfd_relocate_contents): Add BFD_RELOC_SH_LOOP_START and
BFD_RELOC_SH_LOOP_END.
* elf32-sh.c (sh_elf_howto_tab): Change special_func to
sh_elf_ignore_reloc for all entries that sh_elf_reloc used to ignore.
Add entries for R_SH_LOOP_START and R_SH_LOOP_END.
(sh_elf_reloc_loop): New function.
(sh_elf_reloc): No need to test for always-to-be-ignored relocs
any more.
(sh_rel): Add entries for BFD_RELOC_SH_LOOP_{START,END}.
(sh_elf_relocate_section): Handle BFD_RELOC_SH_LOOP_{START,END}.
* bfd-in2.h, libbfd.h: Regenerate.
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Reinstate bits of sh4 support that got accidentally deleted.
Add sh-dsp support.
bfd:
* archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros.
(bfd_mach_sh3_dsp): Likewise.
(bfd_mach_sh4): Reinstate.
(bfd_default_scan): Recognize 7410, 7708, 7729 and 7750.
* bfd-in2.h: Regenerate.
* coff-sh.c (struct sh_opcode): flags is no longer short.
(USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros.
(sh_opcode41, sh_opcode42): Integrate as sh_opcode41.
(sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes.
(sh_opcode41, sh_opcode4, sh_opcode80): Likewise.
(sh_opcodes): No longer const.
(sh_dsp_opcodef0, sh_dsp_opcodef): New arrays.
(sh_insn_uses_reg): Check for USESAS and USESR8.
(sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS.
(_bfd_sh_align_load_span): Return early for SH4.
Modify sh_opcodes lookup table for sh-dsp / sh3-dsp.
Take into account that field b of a parallel processing insn
could be mistaken for a separate insn.
* cpu-sh.c (arch_info_struct): New array elements for
sh2, sh-dsp and sh3-dsp.
Reinstate element for sh4.
(SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros.
(SH4_NEXT): Reinstate.
(SH3_NEXT, SH3E_NEXT): Adjust.
* elf-bfd.h (_sh_elf_set_mach_from_flags): Declare.
* elf32-sh.c (sh_elf_set_private_flags): New function.
(sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise.
(sh_elf_merge_private_data): New function.
(elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define.
(bfd_elf32_bfd_copy_private_bfd_data): Define.
(bfd_elf32_bfd_merge_private_bfd_data): Change to
sh_elf_merge_private_data.
gas:
* config/tc-sh.c ("elf/sh.h"): Include.
(sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables.
(md.begin): Initialize target_arch.
Only include opcodes in has table that match selected architecture.
(parse_reg): Recognize register names for sh-dsp.
(parse_at): Recognize post-modify addressing.
(get_operands): The leading space is now optional.
(get_specific): Remove FDREG_N support. Add support for sh-dsp
arguments. Update valid_arch.
(build_Mytes): Add support for SDT_REG_N.
(find_cooked_opcode): New function, broken out of md_assemble.
(assemble_ppi, sh_elf_final_processing): New functions.
(md_assemble): Use find_cooked_opcode and assemble_ppi.
(md_longopts, md_parse_option): New option: -dsp.
* config/tc-sh.h (elf_tc_final_processing): Define.
(sh_elf_final_processing): Declare.
include/elf:
* sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros.
(EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise.
(EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise.
opcodes:
* sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
(print_insn_ppi): Likewise.
(print_insn_shx): Use info->mach to select appropriate insn set.
Add support for sh-dsp. Remove FD_REG_N support.
* sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
(sh_arg_type): Likewise. Remove FD_REG_N.
(sh_dsp_reg_nums): New enum.
(arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
(arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
(arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
(arch_sh3_dsp_up): Likewise.
(sh_opcode_info): New field: arch.
(sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
D_REG_N. Fill in arch field. Add sh-dsp insns.
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