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* Add new port: crx-elfNick Clifton2004-07-072-0/+399
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* include/opcode/Alan Modra2004-06-232-3/+4
| | | | | | | | | | | | | | | | | | | * i386.h (i386_optab): Remove fildd, fistpd and fisttpd. opcodes/ * i386-dis.c (x_mode): Comment. (two_source_ops): File scope. (float_mem): Correct fisttpll and fistpll. (float_mem_mode): New table. (dofloat): Use it. (OP_E): Correct intel mode PTR output. (ptr_reg): Use open_char and close_char. (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for operands. Set two_source_ops. gas/testsuite/ * gas/i386/prescott.s: Remove fisttpd and fisttpq. * gas/i386/prescott.d: Update.
* Reorganise m68k instruction decoding and improve handling of MAC/EMACNick Clifton2004-05-242-0/+7
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* Add support for 521x,5249,547x,548x.Nick Clifton2004-05-052-16/+26
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* Add support for ColdFire MAC instructions and tidy up support for other m68kNick Clifton2004-04-222-6/+28
| | | | variants.
* Reorder it.H.J. Lu2004-03-201-4/+4
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* Correct the ChangeLog entry.H.J. Lu2004-03-201-0/+4
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* opcodes/Alan Modra2004-03-162-13/+20
| | | | | | | | | | | | | | | | | | | * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle PPC_OPERANDS_GPR_0. * ppc-opc.c (RA0): Define. (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0. (RAOPT): Rename from RAO. Update all uses. (powerpc_opcodes): Use RA0 as appropriate. Add "lsdx", "lsdi", "stsdx", "stsdi", "lmd" and "stmd" insns. include/opcode/ * ppc.h (PPC_OPERAND_GPR_0): Define. Bump other operand defines. gas/testsuite/ Update gas/ppc/. ld/testsuite/ Update ld-powerpc/.
* 2004-03-12 Michal Ludvig <mludvig@suse.cz>Michal Ludvig2004-03-122-0/+6
| | | | * i386.h (i386_optab): Added xstore as an alias for xstorerng.
* * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.Jakub Jelinek2004-03-121-3/+3
| | | | | | | | (INVLPG_Fixup): New function. (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag. * opcode/i386.h (i386_optab): Remove CpuNo64 from sysenter and sysexit.
* 2004-03-12 Michal Ludvig <mludvig@suse.cz>Michal Ludvig2004-03-122-0/+11
| | | | | | | | | | | * gas/config/tc-i386.c (output_insn): Handle PadLock instructions. * gas/config/tc-i386.h (CpuPadLock): New define. (CpuUnknownFlags): Added CpuPadLock. * include/opcode/i386.h (i386_optab): Added xstore/xcrypt insns. * opcodes/i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines. (dis386_twobyte): Opcode 0xa7 is PADLOCK_0. (padlock_table): New struct with PadLock instructions. (print_insn): Handle PADLOCK_SPECIAL.
* Add support for relaxing the 32bit ldc/stc instructions.Nick Clifton2004-02-092-4/+9
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* Add support for relaxation of bit manipulation instructions.Nick Clifton2004-01-122-2/+6
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* (BITOP): Dissallow operations on @aa:16 and @aa:32 except for the H8S.Nick Clifton2004-01-092-27/+28
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* Split ChangeLog files.Alan Modra2004-01-022-3097/+3106
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* * config/tc-mips.c (macro): Handle new macros: "lca" and "dlca"Maciej W. Rozycki2003-11-181-0/+2
| | | | | | | | | | | | | | | for loading addresses using CALL relocations. Don't emit CALL relocations when a base register is used. * gas/mips/lca-svr4pic.d: New test for the "lca" macro. * gas/mips/lca-xgot.d: Likewise. * gas/mips/lca.s: Source for the new tests. * gas/mips/mips.exp: Run the new tests. * opcode/mips.h: Define new enum members, M_LCA_AB and M_DLCA_AB. * mips-opc.c (mips_builtin_opcodes): Handle new macros: "lca" and "dlca".
* Add ColfFire v4 supportNick Clifton2003-10-212-49/+65
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* * mmix.h (JMP_INSN_BYTE): Define.Hans-Peter Nilsson2003-10-192-1/+6
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* [ bfd/ChangeLog ]Chris Demetriou2003-09-302-4/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2003-09-30 Chris Demetriou <cgd@broadcom.com> * archures.c (bfd_mach_mipsisa64r2): New define. * bfd-in2.h: Regenerate. * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2. * cpu-mips.c (I_mipsisa64r2): New enum value. (arch_info_struct): Add entry for I_mipsisa64r2. * elfxx-mips.c (_bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2. (mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case. (mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2. [ binutils/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2. [ gas/Changelog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs. * configure: Regenerate. * config/tc-mips.c (imm2_expr): New variable. (md_assemble, mips16_ip): Initialize imm2_expr. (ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2. (macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands. (macro): Handle M_DEXT and M_DINS. (validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands. (mips_ip): Likewise. (OPTION_MIPS64R2): New define. (md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2). OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2. (md_parse_option): Handle OPTION_MIPS64R2. (s_mipsset): Handle setting "mips64r2" ISA. (mips_cpu_info_table): Add mips64r2. (md_show_usage): Document -mips64r2 option. * doc/as.texinfo: Docuemnt -mips64r2 option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips64r2.d: New file. * gas/mips/cp0sel-names-mips64r2.d: New file. * gas/mips/elf_arch_mips64r2.d: New file. * gas/mips/hwr-names-mips64r2.d: New file. * gas/mips/mips32r2-ill-fp64.l: New file. * gas/mips/mips32r2-ill-fp64.s: New file. * gas/mips/mips64r2-ill.l: New file. * gas/mips/mips64r2-ill.s: New file. * gas/mips/mips64r2.d: New file. * gas/mips/mips64r2.s: New file. * gas/mips/mips.exp: Define "mips64r2" arch, and run new tests. [ include/elf/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_64R2): New define. [ include/opcode/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document +E, +F, +G, +H, and +I operand types. Update documentation of I, +B and +C operand types. (INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines. (M_DEXT, M_DINS): New enum values. [ ld/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ldmain.c (get_emulation): Ignore "-mips64r2". [ ld/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ld-mips-elf/mips-elf-flags.exp: Add tests for combinations with MIPS64r2. [ opcodes/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_arch_choices): Add entry for "mips64r2" (print_insn_args): Add handing for +E, +F, +G, and +H. * mips-opc.c (I65): New define for MIPS64r2. (mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins", "dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh", and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to be supported on MIPS64r2.
* Add binutils support for v850e1 processorNick Clifton2003-09-042-0/+5
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* * ppc.h (PPC_OPCODE_440): Define. Formatting. Use hex for otherAlan Modra2003-08-192-23/+31
| | | | PPC_OPCODE_* defines.
* include/opcode/ChangeLog:Jason Eckhardt2003-08-172-3/+9
| | | | | | | | | | | | | | | | 2003-08-16 Jason Eckhardt <jle@rice.edu> * i860.h (fmov.ds): Expand as famov.ds. (fmov.sd): Expand as famov.sd. (pfmov.ds): Expand as pfamov.ds. gas/testsuite/ChangeLog: 2003-08-16 Jason Eckhardt <jle@rice.edu> * gas/i860/pseudo-ops01.{s,d}: New files. * gas/i860/i860.exp: Execute the new test above. * gas/i860/README.i860: Mention that pseudo-ops need more testing and remove the align fill defect from the list.
* Convert cgen to C-90Michael Meissner2003-08-082-89/+98
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* Convert to C90.Alan Modra2003-08-0712-138/+150
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* 2003-07-18 Michael Snyder <msnyder@redhat.com>Michael Snyder2003-07-292-11/+15
| | | | * include/opcode/h8sx.h (DO_MOVA1, DO_MOVA2): Reformatting.
* include/opcode/Richard Sandiford2003-07-152-0/+7
| | | | | | | | | | | | | | | | | | | | | | | * mips.h (CPU_RM7000): New macro. (OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns. bfd/ * archures.c (bfd_mach_mips7000): New. * bfd-in2.h: Regenerated. * cpu-mips.c (arch_info_struct): Add an entry for mips:7000. * elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000. (mips_mach_extensions): Add an entry for it. opcodes/ * mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries. gas/ * config/tc-mips.c (hilo_interlocks): True for CPU_RM7000. (mips_cpu_info_table): Add rm7000 and rm9000 entries. gas/testsuite/ * gas/mips/rm7000.[sd]: New test. * gas/mips/mips.exp: Run it.
* 2000-04-01 Alexandre Oliva <aoliva@cygnus.com>Alexandre Oliva2003-07-102-0/+17
| | | | | | | | * mn10300.h (AM33_2): Renamed from AM33. 2000-03-31 Alexandre Oliva <aoliva@cygnus.com> * mn10300.h (AM332, FMT_D3): Defined. (MN10300_OPERAND_FSREG, MN10300_OPERAND_FDREG): Likewise. (MN10300_OPERAND_FPCR): Likewise.
* * s390.h (s390_opcode_cpu_val): Add enum for cpu type z990.Martin Schwidefsky2003-07-012-1/+6
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* include/opcode/Richard Sandiford2003-06-252-7/+13
| | | | | | | | | | | | | * h8300.h (IMM2_NS, IMM8_NS, IMM16_NS): Remove. (IMM8U, IMM8U_NS): Define. (h8_opcodes): Use IMM8U_NS for mov.[wl] #xx:8,@yy. gas/ * config/tc-h8300.c (get_specific): Allow ':8' to be used for unsigned 8-bit operands. gas/testsuite/ * gas/h8300/h8sx_mov_imm.[sd]: Add tests for mov.[wl] #xx:8,@yy.
* * include/opcode/h8300.h (h8_opcodes): Fix the mov.l @(dd:32,ERs),ERdRichard Sandiford2003-06-252-2/+9
| | | | and mov.l ERs,@(dd:32,ERd) entries.
* gas/H.J. Lu2003-06-232-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * gas/config/tc-i386.c (md_assemble): Support Intel Precott New Instructions. * gas/config/tc-i386.h (CpuPNI): New. (CpuUnknownFlags): Add CpuPNI. gas/testsuite/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add prescott. * gas/i386/prescott.d: New file. * gas/i386/prescott.s: Likewise. include/opcode/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Support Intel Precott New Instructions. opcodes/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in Intel Precott New Instructions. (PREGRP27): New. Added for "addsubpd" and "addsubps". (PREGRP28): New. Added for "haddpd" and "haddps". (PREGRP29): New. Added for "hsubpd" and "hsubps". (PREGRP30): New. Added for "movsldup" and "movddup". (PREGRP31): New. Added for "movshdup" and "movhpd". (PREGRP32): New. Added for "lddqu". (dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry. Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for entry 0xd0. Use PREGRP32 for entry 0xf0. (twobyte_has_modrm): Updated. (twobyte_uses_SSE_prefix): Likewise. (grps): Use PNI_Fixup in the "sidtQ" entry. (prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30, PREGRP31 and PREGRP32. (float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb. Use "fisttpll" in entry 1 in opcode 0xdd. Use "fisttp" in entry 1 in opcode 0xdf.
* Fix typo.Michael Snyder2003-06-191-1/+1
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* Add "attn", "lq" and "stq" power4 insns.Alan Modra2003-06-102-113/+120
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* include/opcode/Richard Sandiford2003-06-102-7/+15
| | | | | | | | | | * h8300.h (IMM4_NS, IMM8_NS): New. (h8_opcodes): Replace IMM4 with IMM4_NS in mov.b and mov.w entries. Likewise IMM8 for mov.w and mov.l. Likewise IMM16U for mov.l. gas/testsuite * gas/h8300/h8sx_mov_imm.[sd]: New test. * gas/h8300/h8300.exp: Run it.
* 2003-06-03 Michael Snyder <msnyder@redhat.com>Michael Snyder2003-06-052-24/+48
| | | | | | | | | * h8sx.h (enum h8_model): Add AV_H8S to distinguish from H8H. (ldc): Split ccr ops from exr ops (which are only available on H8S or H8SX). (stc): Ditto. (andc, orc, xorc): Ditto. (ldmac, stmac, clrmac, mac): Change access to AV_H8S.
* 2003-06-03 Michael Snyder <msnyder@redhat.com>Michael Snyder2003-06-032-545/+1814
| | | | | | and Bernd Schmidt <bernds@redhat.com> and Alexandre Oliva <aoliva@redhat.com> * h8300.h: Add support for h8300sx instruction set.
* 2003-05-23 Jason Eckhardt <jle@rice.edu>Jason Eckhardt2003-05-242-3/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gas: * config/tc-i860.c (target_xp): Declare variable. (OPTION_XP): Declare macro. (md_longopts): Add option -mxp. (md_parse_option): Set target_xp. (md_show_usage): Add -mxp usage. (i860_process_insn): Recognize XP registers bear, ccr, p0-p3. (md_assemble): Don't try expansions if XP_ONLY is set. * doc/c-i860.texi: Document -mxp option. gas/testsuite: * gas/i860/xp.s: New file. * gas/i860/xp.d: New file. include/opcode: * i860.h (expand_type): Add XP_ONLY. (scyc.b): New XP instruction. (ldio.l): Likewise. (ldio.s): Likewise. (ldio.b): Likewise. (ldint.l): Likewise. (ldint.s): Likewise. (ldint.b): Likewise. (stio.l): Likewise. (stio.s): Likewise. (stio.b): Likewise. (pfld.q): Likewise. opcodes: * i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3. (print_insn_i860): Grab 4 bits of the control register field instead of 3.
* 2003-05-20 Jason Eckhardt <jle@rice.edu>Jason Eckhardt2003-05-212-3/+8
| | | | | opcode/i860.h (flush): Set lower 3 bits properly and use 'L' for the immediate operand type instead of 'i'.
* 2003-05-20 Jason Eckhardt <jle@rice.edu>Jason Eckhardt2003-05-212-10/+17
| | | | | | | | | | | opcode/i860.h (fzchks): Both S and R bits must be set. (pfzchks): Likewise. (faddp): Likewise. (pfaddp): Likewise. (fix.ss): Remove (invalid instruction). (pfix.ss): Likewise. (ftrunc.ss): Likewise. (pftrunc.ss): Likewise.
* 2003-05-18 Jason Eckhardt <jle@rice.edu>Jason Eckhardt2003-05-182-2/+6
| | | | | | | | | | | | | | | | gas: * config/tc-i860.c (i860_process_insn): Initialize fc after each opcode mismatch. include/opcode: * i860.h (form, pform): Add missing .dd suffix. opcodes: * i860-dis.c (print_insn_i860): Instruction shrd has a dual bit, print it. bfd: * elf32-i860.c (elf32_i860_relocate_highadj): Simplify calculation.
* * m68hc11.h (M68HC12_BANK_VIRT): Define to 0x010000Stephane Carrez2003-05-132-1/+5
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* 2003-04-07 Michael Snyder <msnyder@redhat.com>Michael Snyder2003-04-132-4/+8
| | | | * h8300.h (ldc/stc): Fix up src/dst swaps.
* * mips.h: Correct comment typo.Alan Modra2003-04-092-1/+5
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* Namespace cleanup for the tic4x target. Replace s/c4x/tic4x/ and ↵Svein Seldal2003-04-041-29/+29
| | | | s/c3x/tic3x/. 2003 copyright update
* * s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.Martin Schwidefsky2003-03-212-4/+20
| | | | | (S390_OPCODE_ESAME): Rename to S390_OPCODE_ZARCH. (s390_opcode): Remove architecture. Add modes and min_cpu.
* (O_SYS_CMDLINE): New pseudo opcode for command line processing.Nick Clifton2003-03-172-0/+7
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* (ldmac, stmac): Replace MACREG with MS32 and MD32.Nick Clifton2003-02-212-44/+50
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* * hppa.h (ldwa, ldda): Add ordered opcodes.John David Anglin2003-01-311-0/+2
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* include/elf/ChangeLogAlan Modra2003-01-232-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * sh.h: Split out various bits to bfd/elf32-sh64.h. include/opcode/ChangeLog * m68hc11.h (cpu6812s): Define. bfd/ChangeLog * elf-bfd.h (struct bfd_elf_section_data): Remove tdata. Change dynindx to an int. Rearrange for better packing. * elf.c (_bfd_elf_new_section_hook): Don't alloc if already done. * elf32-mips.c (bfd_elf32_new_section_hook): Define. * elf32-sh64.h: New. Split out from include/elf/sh.h. (struct _sh64_elf_section_data): New struct. (sh64_elf_section_data): Don't dereference sh64_info (was tdata). * elf32-sh64-com.c: Include elf32-sh64.h. * elf32-sh64.c: Likewise. (sh64_elf_new_section_hook): New function. (bfd_elf32_new_section_hook): Define. (sh64_elf_fake_sections): Adjust for sh64_elf_section_data change. (sh64_bfd_elf_copy_private_section_data): Likewise. (sh64_elf_final_write_processing): Likewise. * elf32-sparc.c (struct elf32_sparc_section_data): New. (elf32_sparc_new_section_hook): New function. (SET_SEC_DO_RELAX, SEC_DO_RELAX): Delete. (sec_do_relax): Define. (elf32_sparc_relax_section): Adjust to use sec_do_relax. (elf32_sparc_relocate_section): Likewise. * elf64-mips.c (bfd_elf64_new_section_hook): Define. * elf64-mmix.c (struct _mmix_elf_section_data): New. (mmix_elf_section_data): Define. Use throughout file. (mmix_elf_new_section_hook): New function. (bfd_elf64_new_section_hook): Define. * elf64-ppc.c (struct _ppc64_elf_section_data): New. (ppc64_elf_section_data): Define. Use throughout. (ppc64_elf_new_section_hook): New function. (bfd_elf64_new_section_hook): Define. * elf64-sparc.c (struct sparc64_elf_section_data): New. (sparc64_elf_new_section_hook): New function. (SET_SEC_DO_RELAX, SEC_DO_RELAX): Delete. (sec_do_relax): Define. (sparc64_elf_relax_section): Adjust to use sec_do_relax. (sparc64_elf_relocate_section): Likewise. (bfd_elf64_new_section_hook): Define. * elfn32-mips.c (bfd_elf32_new_section_hook): Define. * elfxx-mips.c (struct _mips_elf_section_data): New. (mips_elf_section_data): Define. Use throughout. (_bfd_mips_elf_new_section_hook): New function. (mips_elf_create_got_section): Don't alloc used_by_bfd. * elfxx-mips.h (_bfd_mips_elf_new_section_hook): Declare. * elfxx-target.h (bfd_elfNN_new_section_hook): Add #ifndef. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. opcodes/ChangeLog * sh64-dis.c: Include elf32-sh64.h. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. gas/ChangeLog * config/tc-sh64.c (shmedia_frob_section_type): Adjust for changed sh64_elf_section_data. * config/tc-sh64.h: Include elf32-sh64.h. * config/tc-m68hc11.c: Don't include stdio.h. (md_show_usage): Fix missing continuation. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. ld/ChangeLog * emultempl/sh64elf.em: Include elf32-sh64.h. (sh64_elf_${EMULATION_NAME}_before_allocation): Adjust for changed sh64_elf_section_data. (sh64_elf_${EMULATION_NAME}_after_allocation): Likewise.
* 2003-01-07 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2003-01-082-9/+16
| | | | | | | * mips.h: Fix missing space in comment. (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5) (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right by four bits.
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