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* 2000-07-22 Jason Eckhardt <jle@cygnus.com>Jason Eckhardt2000-07-281-300/+306
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * include/opcode/i860.h (btne, bte, bla): Changed these opcodes to use sbroff ('r') instead of split16 ('s'). (J, K, L, M): New operand types for 16-bit aligned fields. (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to use I, J, K, L, M instead of just I. (T, U): New operand types for split 16-bit aligned fields. (st.x): Changed these opcodes to use S, T, U instead of just S. (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not exist on the i860. (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860. (pfeq.ss, pfeq.dd): New opcodes. (st.s): Fixed incorrect mask bits. (fmlow): Fixed incorrect mask bits. (fzchkl, pfzchkl): Fixed incorrect mask bits. (faddz, pfaddz): Fixed incorrect mask bits. (form, pform): Fixed incorrect mask bits. (pfld.l): Fixed incorrect mask bits. (fst.q): Fixed incorrect mask bits. (all floating point opcodes): Fixed incorrect mask bits for handling of dual bit. * include/elf/i860.h: New file. (elf_i860_reloc_type): Defined ELF32 i860 relocations. * bfd/cpu-i860.c: Added comments. * bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to bfd_elf32_i860_little_vec. (TARGET_LITTLE_NAME): Defined to "elf32-i860-little". (ELF_MAXPAGESIZE): Changed to 4096. * bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of new target. (bfd_target_vector): Added bfd_elf32_i860_little_vec. * bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added config for little endian elf32 i860. (targ_defvec): Define for the new config above as "bfd_elf32_i860_little_vec". (targ_selvecs): Define for the new config above as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec" * bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition of new target vec. * bfd/configure: Regenerated. * opcodes/i860-dis.c: New file. (print_insn_i860): New function. (print_br_address): New function. (sign_extend): New function. (BITWISE_OP): New macro. (I860_REG_PREFIX): New macro. (grnames, frnames, crnames): New structures. * opcodes/disassemble.c (ARCH_i860): Define. (disassembler): Add check for bfd_arch_i860 to set disassemble function to print_insn_i860. * include/dis-asm.h (print_insn_i860): Add prototype. * opcodes/Makefile.in (CFILES): Added i860-dis.c. (ALL_MACHINES): Added i860-dis.lo. (i860-dis.lo): New dependences. * opcodes/configure.in: New bits for bfd_i860_arch. * opcodes/configure: Regenerated.
* 2000-07-26 Dave Brolley <brolley@redhat.com>Dave Brolley2000-07-262-1/+5
| | | | * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
* cris.h: New file.Hans-Peter Nilsson2000-07-202-0/+302
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* Applied Marek Michalkiewicz <marekm@linux.org.pl>'s patch to ehance the AVR ↵Nick Clifton2000-06-272-11/+20
| | | | port.
* Applied Stephane Carrez <Stephane.Carrez@worldnet.fr> patches to add supportNick Clifton2000-06-193-1/+423
| | | | for m68hc11 and m68hc12 processors.
* * avr.h: clr,lsl,rol, ... moved after add,adc, ...Denis Chertykov2000-06-092-5/+9
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* * avr.h: New file with AVR opcodes.Denis Chertykov2000-06-072-0/+211
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* Define the ALONE flag bit, for use in the opcode table.Donald Lindsay2000-05-252-0/+5
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* Allow d suffix on iretAlan Modra2000-05-232-2/+7
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* Fix fild.Alan Modra2000-05-172-3/+7
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* * cgen/opcodes fixFrank Ch. Eigler2000-05-162-4/+27
| | | | | | | | | | | | | | | | | | | * approved by nickc [opcodes/ChangeLog] 2000-05-16 Frank Ch. Eigler <fche@redhat.com> * fr30-desc.h: Partially regenerated to account for changed CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros. * m32r-desc.h: Ditto. [include/opcode/ChangeLog] 2000-05-16 Frank Ch. Eigler <fche@redhat.com> * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set. (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
* Fix cpu_flags for sys{enter,exit} fx{save,restore}Alan Modra2000-05-132-5/+9
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* `.arch cpu_type' pseudo for x86.Alan Modra2000-05-132-774/+805
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* Support for tic54x target.Tim Wall2000-05-062-0/+171
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* * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.J.T. Conklin2000-05-032-0/+13
| | | | (PPC_OPERAND_VR): New operand flag for vector registers.
* * h8300.h (EOP): Add missing initializer.Jeff Law2000-05-012-1/+5
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* * hppa.h (pa_opcodes): New opcodes for PA2.0 wide modeJeff Law2000-04-212-25/+44
| | | | | | | | | forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements). New operand types l,y,&,fe,fE,fx added to support above forms. (pa_opcodes): Replaced usage of 'x' as source/target for floating point double-word loads/stores with 'fx'. Fr
* IA-64 ELF support.Jim Wilson2000-04-212-0/+395
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* Fix value of SHORT_A1.Nick Clifton2000-03-272-15/+21
| | | | Move SHORT_AR to end of list of short instructions.
* Mostly cosmetic. Fixes to comments. Don't start as_bad and as_warnAlan Modra2000-03-262-62/+80
| | | | messages with capital. Don't malign Unixware, malign SysV386 instead.
* Apply patch for 100679Nick Clifton2000-03-022-35/+56
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* Extend the i386 gas testsuite to do some tests for intel_syntax. Fix allAlan Modra2000-02-252-2/+7
| | | | | | | the errors exposed by this addition. These were intel mode "fi... word ptr", "fi... dword ptr", "jmp Imm seg, Imm offset", "out dx,al". The failure with intel "out dx,al" was also present in att "out al,dx". Extend testsuite to catch this case too.
* Rename 'flags' to 'signed_overflow_ok_p'Nick Clifton2000-02-242-9/+8
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* 2000-02-24 Andrew Haley <aph@cygnus.com>Andrew Haley2000-02-242-1/+27
| | | | | | * cgen.h (CGEN_INSN_MACH_HAS_P): New macro. (CGEN_CPU_TABLE): flags: new field. Add prototypes for new functions.
* Forgot Changelog for last i386.h change.Alan Modra2000-02-241-0/+4
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* Correct intel_syntax fsub* and fdiv* handling. Oh, how I'd like to be ridAlan Modra2000-02-241-4/+9
| | | | of UNIXWARE_COMPAT.
* Add IBM 370 support.Alan Modra2000-02-232-0/+269
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* * opcode/d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation cannotChandra Chavva2000-02-221-1/+3
| | | | be combined in parallel with ADD/SUBppp.
* g2000-02-22 Andrew Haley <aph@cygnus.com>Andrew Haley2000-02-222-1/+8
| | | | * mips.h: (OPCODE_IS_MEMBER): Add comment.
* ChangeLog change only.Andrew Haley2000-02-221-1/+3
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* 1999-12-30 Andrew Haley <aph@cygnus.com>Andrew Haley2000-02-222-2/+10
| | | | * mips.h (OPCODE_IS_MEMBER): Add gp32 arg.
* Cosmetic changes to tc-i386.[ch] + extend x86 gas testsuite jmp andAlan Modra2000-01-152-2/+6
| | | | call tests + tweak intel mode far call and jmp.
* x86 indirect jump/call syntax fixes. Disassembly fix for lcall.Alan Modra1999-12-272-2/+10
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* * mn10300.h: Add new operand types. Add new instruction formats.Jeff Law1999-12-012-0/+27
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* * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"Jeff Law1999-11-252-2/+10
| | | | instruction.
* For include/opcode:Gavin Koch1999-11-182-0/+5
| | | | | | | | | | | * mips.h (INSN_ISA5): New. For opcodes: * mips-opc.c (I5): New. (abs.ps,add.ps,alnv.ps,c.COND.ps,cvt.s.pl,cvt.s.pu,cvt.ps.s madd.ps,movf.ps,movt.ps,mul.ps,net.ps,nmadd.ps,nmsub.ps, pll.ps,plu.ps,pul.ps,puu.ps,sub.ps,suxc1,luxc1): New.
* For include/opcode:Gavin Koch1999-11-012-0/+22
| | | | | | | | | | | | | * mips.h (OPCODE_IS_MEMBER): New. For gas: * config/tc-mips.c (macro_build): Use OPCODE_IS_MEMBER. (mips_ip): Use OPCODE_IS_MEMBER. For opcodes: * mips-dis.c (_print_insn_mips): Use OPCODE_IS_MEMBER.
* Define SHORT_AR (fix for CR: 101340)Nick Clifton1999-10-292-0/+5
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* Add md expression support; Cleanup alpha warningsMichael Meissner1999-10-182-2/+7
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* * hppa.h (pa_opcodes): Add load and store cache control toJeff Law1999-10-102-75/+123
| | | | | | | | | | instructions. Add ordered access load and store. * hppa.h (pa_opcode): Add new entries for addb and addib. * hppa.h (pa_opcodes): Fix cmpb and cmpib entries. * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
* Added seven new instructions ld, ld2w, sac, sachi, slae, st andDiego Novillo1999-10-072-0/+8
| | | | | st2w for d10v. Created new testsuite for d10v to verify new instructions.
* Add missing initializer lost in last change.Jeff Law1999-09-231-1/+1
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* * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"Jeff Law1999-09-232-17/+29
| | | | and "be" using completer prefixes.
* * hppa.h (pa_opcodes): Add initializers to silence compiler.Jeff Law1999-09-232-271/+273
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* * hppa.h: Update comments about character usage.Jeff Law1999-09-232-1/+8
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* * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaningJeff Law1999-09-202-8/+13
| | | | up the new fstw & bve instructions.
* * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/storeJeff Law1999-09-192-1/+17
| | | | instructions.
* * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.Jeff Law1999-09-192-0/+11
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* * hppa.h (pa_opcodes): Add long offset double word load/storeJeff Law1999-09-192-3/+18
| | | | instructions.
* * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads andJeff Law1999-09-192-1/+20
| | | | stores.
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