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* 2006-01-31 Paul Brook <paul@codesourcery.com>Paul Brook2006-01-312-48/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Richard Earnshaw <rearnsha@arm.com> * gas/config/tc-arm.c: Use arm_feature_set. (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none, arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1, fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2): New variables. (insns): Use them. (md_atof, opcode_select, opcode_select, md_assemble, md_assemble, md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch, arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes, s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU feature flags. (arm_legacy_option_table, arm_option_cpu_value_table): New types. (arm_opts): Move old cpu/arch options from here... (arm_legacy_opts): ... to here. (md_parse_option): Search arm_legacy_opts. (arm_cpus, arm_archs, arm_extensions, arm_fpus) (arm_float_abis, arm_eabis): Make const. * include/opcode/arm.h: Use ARM_CPU_FEATURE. (ARM_AEXT_*, FPU_ENDIAN_PURE, FPU_VFP_HARD): New. (arm_feature_set): Change to a structure. (ARM_CPU_HAS_FEATURE, ARM_MERGE_FEATURE_SETS, ARM_CLEAR_FEATURE, ARM_FEATURE): New macros.
* * cris.h (MOVE_M_TO_PREG_OPCODE, MOVE_M_TO_PREG_ZBITS)Hans-Peter Nilsson2005-12-072-2/+15
| | | | | (MOVE_PC_INCR_OPCODE_PREFIX, MOVE_PC_INCR_OPCODE_SUFFIX): New macros. (ADD_PC_INCR_OPCODE): Don't define.
* gas/H.J. Lu2005-12-062-3/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2005-12-06 H.J. Lu <hongjiu.lu@intel.com> PR gas/1874 * config/tc-i386.c (match_template): Handle monitor. (process_suffix): Likewise. gas/testsuite/ 2005-12-06 H.J. Lu <hongjiu.lu@intel.com> PR gas/1874 * gas/i386/i386.exp: Add x86-64-prescott for 64bit. * gas/i386/prescott.s: Test address size override for monitor. * gas/i386/prescott.d: Updated. * gas/i386/x86-64-prescott.d: New file. * gas/i386/x86-64-prescott.s: Likewise. include/opcode/ 2005-12-06 H.J. Lu <hongjiu.lu@intel.com> PR gas/1874 * i386.h (i386_optab): Add 64bit support for monitor and mwait. opcodes/ 2005-12-06 H.J. Lu <hongjiu.lu@intel.com> PR gas/1874 * i386-dis.c (address_mode): New enum type. (address_mode): New variable. (mode_64bit): Removed. (ckprefix): Updated to check address_mode instead of mode_64bit. (prefix_name): Likewise. (print_insn): Likewise. (putop): Likewise. (print_operand_value): Likewise. (intel_operand_size): Likewise. (OP_E): Likewise. (OP_G): Likewise. (set_op): Likewise. (OP_REG): Likewise. (OP_I): Likewise. (OP_I64): Likewise. (OP_OFF): Likewise. (OP_OFF64): Likewise. (ptr_reg): Likewise. (OP_C): Likewise. (SVME_Fixup): Likewise. (print_insn): Set address_mode. (PNI_Fixup): Add 64bit and address size override support for monitor and mwait.
* * mips.h: Assign 'm'/'M' codes to MIPS16e save/restoreThiemo Seufer2005-11-142-1/+14
| | | | | | | | | | | | | | | | | instructions. Define MIPS16_ALL_ARGS and MIPS16_ALL_STATICS for save/restore encoding of the args field. * mips16-opc.c: Add MIPS16e save/restore opcodes. * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M' codes for save/restore. * config/tc-mips.c (mips16_ip): Add handling of 'm' and 'M' codes for the MIPS16e save/restore instructions. * gas/mips/mips.exp: Run new save/restore tests. * gas/testsuite/gas/mips/mips16e-save.s: New test for generating different styles of save/restore instructions. * gas/testsuite/gas/mips/mips16e-save.d: New.
* 2005-10-28 Dave Brolley <brolley@redhat.com>Dave Brolley2005-10-281-0/+22
| | | | | | | | Contribute the following changes: 2003-09-29 Dave Brolley <brolley@redhat.com> * dis-asm.h (disassemble_info): insn_sets now (void *) to allow for more exotic underlying types to be used.
* 2005-10-28 Dave Brolley <brolley@redhat.com>Dave Brolley2005-10-283-7/+83
| | | | | | | | | Contribute the following changes: 2005-02-16 Dave Brolley <brolley@redhat.com> * cgen-bitset.h: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename cgen_isa_mask_* to cgen_bitset_*. * cgen.h: Likewise.
* Add support for the Z80 processor familyNick Clifton2005-10-251-0/+4
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* include/opcode/Jan Beulich2005-10-242-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2005-10-24 Jan Beulich <jbeulich@novell.com> * ia64.h (enum ia64_opnd): Move memory operand out of set of indirect operands. bfd/ 2005-10-24 Jan Beulich <jbeulich@novell.com> * cpu-ia64-opc.c (elf64_ia64_operands): Move memory operand out of set of indirect operands. gas/ 2005-10-24 Jan Beulich <jbeulich@novell.com> * config/tc-ia64.c (enum reg_symbol): Delete IND_MEM. (dot_rot): Change type of num_* variables. Check for positive count. (ia64_optimize_expr): Re-structure. (md_operand): Check for general register. gas/testsuite/ 2005-10-24 Jan Beulich <jbeulich@novell.com> * gas/ia64/index.[sl]: New. * gas/ia64/rotX.[sl]: New. * gas/ia64/ia64.exp: Run new tests. opcodes/ 2005-10-24 Jan Beulich <jbeulich@novell.com> * ia64-asmtab.c: Regenerate.
* * hppa.h (pa_opcodes): Add two fcmp opcodes. Reorder ftest opcodes.John David Anglin2005-10-162-1/+8
| | | | Add FLAG_STRICT to pa10 ftest opcode.
* * gas/hppa/basic/basic.exp (do_system): Adjust for removal of lhaJohn David Anglin2005-10-132-4/+6
| | | | | | | instructions from system.s. * gas/hppa/basic/system.s (lha): Remove. * hppa.h (pa_opcodes): Remove lha entries.
* * config/tc-hppa.c (strict): Don't initialize. Update comment.John David Anglin2005-10-082-84/+151
| | | | | | | | | | (pa_ip): Promote from PA 1.0 to 1.1 immediately when 1.1 match is found. Simplify handling of "ma" and "mb" completers. * hppa.h (FLAG_STRICT): Revise comment. (pa_opcode): Revise ordering rules. Add/move strict pa10 variants before corresponding pa11 opcodes. Add strict pa10 register-immediate entries for "fdc".
* * dis-asm.h (print_insn_bfin): Declare.Catherine Moore2005-09-301-0/+1693
| | | | | | * elf/bfin.h: New file. * elf/common.h (EM_BLACKFIN): Define. * opcode/bfin.h: New file.
* * hppa.h (pa_opcodes): Add new "fdc" and "fic" opcode entries.John David Anglin2005-09-252-1/+8
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* Remove extraneous line.Andreas Schwab2005-09-081-1/+0
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* * mips.h (OP_SH_MT_U, OP_MASK_MT_U, OP_SH_MT_H, OP_MASK_MT_H,Chao-ying Fu2005-09-062-4/+36
| | | | | | | | OP_SH_MTACC_T, OP_MASK_MTACC_T, OP_SH_MTACC_D, OP_MASK_MTACC_D): New define. Document !, $, *, &, g, +t, +T operand formats for MT instructions. (INSN_ASE_MASK): Update to include INSN_MT. (INSN_MT): New define for MT ASE.
* * mips.h (OP_SH_DSPACC, OP_MASK_DSPACC, OP_SH_DSPACC_S,Chao-ying Fu2005-08-252-1/+50
| | | | | | | | | | OP_MASK_DSPACC_S, OP_SH_DSPSFT, OP_MASK_DSPSFT, OP_SH_DSPSFT_7, OP_MASK_DSPSFT_7, OP_SH_SA3, OP_MASK_SA3, OP_SH_SA4, OP_MASK_SA4, OP_SH_IMM8, OP_MASK_IMM8, OP_SH_IMM10, OP_MASK_IMM10, OP_SH_WRDSP, OP_MASK_WRDSP, OP_SH_RDDSP, OP_MASK_RDDSP): New define. Document 3, 4, 5, 6, 7, 8, 9, 0, :, ', @ operand formats for DSP instructions. (INSN_DSP): New define for DSP ASE.
* Remove a29k files.Alan Modra2005-08-182-281/+4
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* gas/Daniel Jacobowitz2005-08-152-1/+8
| | | | | | | | | | | | | | | * config/tc-ppc.c (parse_cpu): Add -me300 support. (md_show_usage): Likewise. * doc/c-ppc.texi (PowerPC-Opts): Document it. include/opcode/ * ppc.h (PPC_OPCODE_E300): Define. opcodes/ * ppc-dis.c (powerpc_dialect): Handle e300. (print_ppc_disassembler_options): Likewise. * ppc-opc.c (PPCE300): Define. (powerpc_opcodes): Mark icbt as available for the e300. binutils/ * doc/binutils.texi (objdump): Document -M e300.
* * s390.h (s390_opcode_cpu_val): Add enum for cpu type z9-109.Martin Schwidefsky2005-08-122-2/+11
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* * hppa.h: Update copyright dates.John David Anglin2005-08-031-1/+1
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* PR gas/336John David Anglin2005-07-282-0/+9
| | | | | * hppa.h (pa_opcodes): Allow 0 immediates in PA 2.0 variants of pdtlb and pitlb.
* include/opcode/Jan Beulich2005-07-272-6/+20
| | | | | | | | 2005-07-27 Jan Beulich <jbeulich@novell.com> * i386.h (i386_optab): Add comment to movd. Use LongMem for all movd-s. Add NoRex64 to movq-s dealing only with mmx or xmm registers. Add movq-s as 64-bit variants of movd-s.
* * hppa.h: Fix punctuation in comment.John David Anglin2005-07-192-2/+4
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* * hppa.h (pa_opcode): Add rules for opcode ordering. Check first forJohn David Anglin2005-07-192-214/+243
| | | | | | | | implicit space-register addressing. Set space-register bits on opcodes using implicit space-register addressing. Add various missing pa20 long-immediate opcodes. Remove various opcodes using implicit 3-bit space-register addressing. Use "fE" instead of "fe" in various fstw opcodes.
* include/opcode/Jan Beulich2005-07-182-2/+6
| | | | | | 2005-07-18 Jan Beulich <jbeulich@novell.com> * i386.h (i386_optab): Operands of aam and aad are unsigned.
* gas/H.J. Lu2005-07-152-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2007-07-15 H.J. Lu <hongjiu.lu@intel.com> * gas/config/tc-i386.h (CpuVMX): New. (CpuUnknownFlags): Add CpuVMX. gas/testsuite/ 2007-07-15 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add vmx and x86-64-vmx. * gas/i386/vmx.d: New file. * gas/i386/vmx.s: Likewise. * gas/i386/x86-64-vmx.d: Likewise. * gas/i386/x86-64-vmx.s: Likewise. include/opcode/ 2007-07-15 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Support Intel VMX Instructions. opcodes/ 2007-07-15 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions. (VMX_Fixup): New. Fix up Intel VMX Instructions. (Em): New. (Gm): New. (VM): New. (dis386_twobyte): Updated entries 0x78 and 0x79. (twobyte_has_modrm): Likewise. (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9. (OP_G): Handle m_mode.
* * hppa.h (pa_opcode): Don't set FLAG_STRICT in pa10 loads and stores.John David Anglin2005-07-112-125/+134
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* gas/Jan Beulich2005-07-052-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2005-07-05 Jan Beulich <jbeulich@novell.com> * config/tc-i386.h (CpuSVME): New. (CpuUnknownFlags): Include CpuSVME. * config/tc-i386.c (cpu_arch): Add .pacifica and .svme. Add opteron as alias of sledgehammer. (md_assemble): Include invlpga in the check for insns with two source operands. (process_operands): Include SVME insns in the check for ignored segment overrides. Adjust diagnostic. (i386_index_check): Special-case SVME insns with memory operands. gas/testsuite/ 2005-07-05 Jan Beulich <jbeulich@novell.com> * gas/i386/svme.d: New. * gas/i386/svme.s: New. * gas/i386/svme64.d: New. * gas/i386/i386.exp: Run new tests. include/opcode/ 2005-07-05 Jan Beulich <jbeulich@novell.com> * i386.h (i386_optab): Add new insns. opcodes/ 2005-07-05 Jan Beulich <jbeulich@novell.com> * i386-dis.c (SVME_Fixup): New. (grps): Use it for the lidt entry. (PNI_Fixup): Call OP_M rather than OP_E. (INVLPG_Fixup): Likewise.
* Update function declarations to ISO C90 formattingNick Clifton2005-07-012-85/+85
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* gas/H.J. Lu2005-06-202-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | 2005-06-20 H.J. Lu <hongjiu.lu@intel.com> PR 1013 * config/tc-i386.c (md_assemble): Don't call optimize_disp on movabs. (optimize_disp): Optimize only if possible. Don't use 64bit displacement on non-constants and do same on constants if possible. gas/testsuite/ 2005-06-20 H.J. Lu <hongjiu.lu@intel.com> PR 1013 * i386/x86_64.s: Add absolute 64bit addressing tests for mov. * i386/x86_64.s: Updated. include/opcode/ 2005-06-20 H.J. Lu <hongjiu.lu@intel.com> PR 1013 * i386.h (i386_optab): Update comments for 64bit addressing on mov. Allow 64bit addressing for mov and movq.
* * hppa.h (pa_opcodes): Use cM and cX instead of cm and cx,John David Anglin2005-06-112-12/+17
| | | | respectively, in various floating-point load and store patterns.
* * hppa.h (FLAG_STRICT): Correct comment.John David Anglin2005-05-232-423/+555
| | | | | | (pa_opcodes): Update load and store entries to allow both PA 1.X and PA 2.0 mneumonics when equivalent. Entries with cache control completers now require PA 1.1. Adjust whitespace.
* * ppc.h (PPC_OPCODE_POWER5): Define.Alan Modra2005-05-192-0/+7
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* Update the address and phone number of the FSF organizationNick Clifton2005-05-1044-54/+65
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* gas/Jan Beulich2005-05-092-0/+6
| | | | | | | | | | | | 2005-05-09 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (parse_insn): Disallow use of prefix separator and comma in Intel mode. include/opcode/ 2005-05-09 Jan Beulich <jbeulich@novell.com> * i386.h (i386_optab): Add ht and hnt.
* gas/ChangeLog:Mark Kettenis2005-04-182-4/+17
| | | | | | | | | | * config/tc-i386.c (md_begin): Allow hyphens in mnemonics. include/opcode/ChangeLog: * i386.h: Insert hyphens into selected VIA PadLock extensions. Add xcrypt-ctr. Provide aliases without hyphens. opcodes/ChangeLog: * i386-dis.c: Insert hyphens into selected VIA PadLock extensions. Add xcrypt-ctr.
* Move entries in ChangeLog-9103 to appropriate */ChangeLog-9103.H.J. Lu2005-04-132-0/+21
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* Move entries to appropriate ChangeLog files.H.J. Lu2005-04-131-0/+38
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* 2005-04-12 Paul Brook <paul@codesourcery.com>Paul Brook2005-04-121-16/+16
| | | | * opcode/m88k.h: Rename psr macros to avoid conflicts.
* include/opcode/ChangeLog:Mark Kettenis2005-04-122-9/+14
| | | | | | | | * i386.h (i386_optab): Mark VIA PadLock instructions as ImmExt and adjust them accordingly. gas/ChangeLog: * config/tc-i386.c (output_insn): Handle VIA PadLock instructions similar to other instructions now that they're marked as ImmExt.
* Fix typo.Andreas Schwab2005-04-041-2/+2
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* include/opcode/Jan Beulich2005-04-012-0/+5
| | | | | | | | | | | | 2005-04-01 Jan Beulich <jbeulich@novell.com> * i386.h (i386_optab): Add rdtscp. opcodes/ 2005-04-01 Jan Beulich <jbeulich@novell.com> * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for easier future additions.
* gas/testsuite/H.J. Lu2005-03-292-4/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2005-03-29 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run segment and inval-seg for i386. Run x86-64-segment and x86-64-inval-seg for x86-64. * gas/i386/intel.d: Expect movw for moving between memory and segment register. * gas/i386/naked.d: Likewise. * gas/i386/opcode.d: Likewise. * gas/i386/x86-64-opcode.d: Likewise. * gas/i386/opcode.s: Use movw for moving between memory and segment register. * gas/i386/x86-64-opcode.s: Likewise. * : Likewise. * gas/i386/inval-seg.l: New. * gas/i386/inval-seg.s: New. * gas/i386/segment.l: New. * gas/i386/segment.s: New. * gas/i386/x86-64-inval-seg.l: New. * gas/i386/x86-64-inval-seg.s: New. * gas/i386/x86-64-segment.l: New. * gas/i386/x86-64-segment.s: New. include/opcode/ 2005-03-29 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Don't allow the `l' suffix for moving moving between memory and segment register. Allow movq for moving between general-purpose register and segment register. opcodes/ 2005-03-29 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (SEG_Fixup): New. (Sv): New. (dis386): Use "Sv" for 0x8c and 0x8e.
* include:Zack Weinberg2005-03-121-2/+7
| | | | | | | | | | | * opcode/arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T. Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2, and ARM_ARCH_V6ZKT2. opcodes: * arm-dis.c (arm_opcodes): Document %E and %V. Add entries for v6T2 ARM instructions: bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx. (print_insn_arm): Add support for %E and %V.
* update copyright datesAlan Modra2005-03-0313-13/+16
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* gas/testsuite/Jan Beulich2005-02-092-7/+14
| | | | | | | | | | | | | | | | 2005-02-09 Jan Beulich <jbeulich@novell.com> * gas/i386/intelok.s: Remove comments disabling alternative forms of fbld, fbstp, and fldcw. * gas/i386/intelok.d: Expect two instances of fbld, fbstp, and fldcw. include/opcode/ 2005-02-09 Jan Beulich <jbeulich@novell.com> PR gas/707 * i386.h (i386_optab): Add x_Suf to fbld and fbstp. Add w_Suf and FloatMF to fldcw, fstcw, fnstcw, and the memory formas of fstsw and fnstsw.
* bfd/ChangeLog:Alexandre Oliva2005-01-252-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2004-12-10 Alexandre Oliva <aoliva@redhat.com> * elf32-frv.c (elf32_frv_relocate_section): Force local binding for TLSMOFF. * reloc.c: Add R_FRV_TLSMOFF. * elf32-frv.c (elf32_frv_howto_table): Likewise. (frv_reloc_map, frv_reloc_type_lookup): Map it. (elf32_frv_relocate_section): Handle it. (elf32_frv_check_relocs): Likewise. * libbfd.h, bfd-in2.h: Rebuilt. 2004-11-26 Alexandre Oliva <aoliva@redhat.com> * elf32-frv.c (_frvfdpic_emit_got_relocs_plt_entries): Don't crash when given an undefweak TLS symbol. Fix constant TLS PLT entries such that they return the constant in gr9. (_frvfdpic_relax_tls_entries): Don't crash for undefweak TLS symbols. (_frvfdpic_size_got_plt): Set _cooked_size of dynamic sections. too, such that they shrink on relaxation. (elf32_frvfdpic_finish_dynamic_sections): Check __ROFIXUP_END__ as marking the position right past the _GLOBAL_OFFSET_TABLE_ value. (_frvfdpic_assign_plt_entries): Shrink constant TLS PLT entries if we can guarantee the use of 16-bit constants. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> Introduce TLS support for FR-V FDPIC. * reloc.c: Add TLS relocations. * elf32-frv.c (elf32_frv_howto_table): Add TLS relocations. (elf32_frv_rel_tlsdesc_value_howto): New. (elf32_frv_rel_tlsoff_howto): New. (frv_reloc_map): Add new mappings. (struct frvfdpic_elf_link_hash_table): Add pointer to summary reloc information. (frvfdpic_dynamic_got_plt_info): New. (frvfdpic_plt_tls_ret_offset): New. (ELF_DYNAMIC_INTERPRETER, DEFAULT_STACK_SIZE): Move earlier. (struct _frvfdpic_dynamic_got_info): Likewise. Add TLS members. (struct _frvfdpic_dynamic_got_plt_info): Likewise. (FRVFDPIC_SYM_LOCAL): Regard symbols defined in the absolute section as local. (struct frvfdpic_relocs_info): Add TLS fields. (frvfdpic_relocs_info_hash): Warning clean up. (frvfdpic_relocs_info_find): Initialize tlsplt_entry. (frvfdpic_pic_merge_early_relocs_info): Merge TLS fields. (FRVFDPIC_TLS_BIAS): Define. (tls_biased_base): New. (_frvfdpic_emit_got_relocs_plt_entries): Deal with TLS relocations. (frv_reloc_type_lookup): Likewise. (frvfdpic_info_to_howto_rel): Likewise. (elf32_frv_relocate_section): Likewise. (_frv_create_got_section): Create the PLT section here. (elf32_frvfdpic_create_dynamic_sections): Not here. (_frvfdpic_count_nontls_entries): Move out of... (_frvfdpic_count_got_plt_entries): ... here. (_frvfdpic_count_tls_entries): Likewise. Add TLS support. (_frvfdpic_count_relocs_fixups): Likewise. Add relaxation support. (_frvfdpic_relax_tls_entries): New. (_frvfdpic_compute_got_alloc_data): Add TLS support. (_frvfdpic_get_tlsdesc_entry): New. (_frvfdpic_assign_got_entries): Add TLS support. (_frvfdpic_assign_plt_entries): Likewise. (_frvfdpic_reset_got_plt_entries): New. (_frvfdpic_size_got_plt): Move out of... (elf32_frvfdpic_size_dynamic_sections): ... here. (_frvfdpic_relax_got_plt_entries): New. (elf32_frvfdpic_relax_section): New. (elf32_frvfdpic_finish_dynamic_sections): Add TLS sanity check. (elf32_frv_check_relocs): Add TLS support. (bfd_elf32_bfd_relax_section): Define for FDPIC. * libbfd.h, bfd-in2.h: Rebuilt. cpu/ChangeLog: 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * frv.cpu: Add support for TLS annotations in loads and calll. * frv.opc (parse_symbolic_address): New. (parse_ldd_annotation): New. (parse_call_annotation): New. (parse_ld_annotation): New. (parse_ulo16, parse_uslo16): Use parse_symbolic_address. Introduce TLS relocations. (parse_d12, parse_s12, parse_u12): Likewise. (parse_uhi16): Likewise. Fix constant checking on 64-bit host. (parse_call_label, print_at): New. gas/ChangeLog: * config/tc-frv.c (md_apply_fix3): Mark TLS symbols as such. 2004-12-10 Alexandre Oliva <aoliva@redhat.com> * config/tc-frv.c (frv_pic_ptr): Add tlsmoff support. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * cgen.c (gas_cgen_parse_operand): Handle CGEN_PARSE_OPERAND_SYMBOLIC. * config/tc-frv.c (md_cgen_lookup_reloc): Handle TLS relocations. (frv_force_relocation): Likewise. Fix handling of PIC relocations. (md_apply_fix3): Likewise. include/elf/ChangeLog: 2004-12-10 Alexandre Oliva <aoliva@redhat.com> * frv.h: Add R_FRV_TLSMOFF. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * frv.h: Add TLS relocations. include/opcode/ChangeLog: 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * cgen.h (enum cgen_parse_operand_type): Add CGEN_PARSE_OPERAND_SYMBOLIC. ld/testsuite/ChangeLog: * ld-frv/fdpic.exp: Add -mfdpic to ASFLAGS. * ld-frv/tls.exp: Likewise. 2004-11-26 Alexandre Oliva <aoliva@redhat.com> * ld-frv/tls-3.s: New. * ld-frv/tls-static-3.d: New. * ld-frv/tls-dynamic-3.d: New. * ld-frv/tls-pie-3.d: New. * ld-frv/tls-shared-3.d: New. * ld-frv/tls-relax-static-3.d: New. * ld-frv/tls-relax-dynamic-3.d: New. * ld-frv/tls-relax-pie-3.d: New. * ld-frv/tls-relax-shared-3.d: New. * ld-frv/tls.exp: Run the new tests. * ld-frv/tls-dynamic-2.d: Adjust for improved relaxation. * ld-frv/tls-relax-dynamic-2.d: Likewise. * ld-frv/tls-relax-initial-shared-2.d: Likewise. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * ld-frv/tls-1-dep.s: New. * ld-frv/tls-1-shared.lds: New. * ld-frv/tls-1.s: New. * ld-frv/tls-2.s: New. * ld-frv/tls-dynamic-1.d: New. * ld-frv/tls-dynamic-2.d: New. * ld-frv/tls-initial-shared-2.d: New. * ld-frv/tls-pie-1.d: New. * ld-frv/tls-relax-dynamic-1.d: New. * ld-frv/tls-relax-dynamic-2.d: New. * ld-frv/tls-relax-initial-shared-2.d: New. * ld-frv/tls-relax-pie-1.d: New. * ld-frv/tls-relax-shared-1.d: New. * ld-frv/tls-relax-shared-2.d: New. * ld-frv/tls-relax-static-1.d: New. * ld-frv/tls-shared-1-fail.d: New. * ld-frv/tls-shared-1.d: New. * ld-frv/tls-shared-2.d: New. * ld-frv/tls-static-1.d: New. * ld-frv/tls.exp: New. * ld-frv/fdpic-pie-1.d: Adjust for 64-bit host. * ld-frv/fdpic-pie-2.d: Likewise. * ld-frv/fdpic-pie-6.d: Likewise. * ld-frv/fdpic-pie-7.d: Likewise. * ld-frv/fdpic-pie-8.d: Likewise. * ld-frv/fdpic-shared-1.d: Likewise. * ld-frv/fdpic-shared-2.d: Likewise. * ld-frv/fdpic-shared-3.d: Likewise. * ld-frv/fdpic-shared-4.d: Likewise. * ld-frv/fdpic-shared-5.d: Likewise. * ld-frv/fdpic-shared-6.d: Likewise. * ld-frv/fdpic-shared-7.d: Likewise. * ld-frv/fdpic-shared-8.d: Likewise. * ld-frv/fdpic-shared-local-2.d: Likewise. * ld-frv/fdpic-shared-local-8.d: Likewise. * ld-frv/fdpic-static-1.d: Likewise. * ld-frv/fdpic-static-2.d: Likewise. * ld-frv/fdpic-static-6.d: Likewise. * ld-frv/fdpic-static-7.d: Likewise. * ld-frv/fdpic-static-8.d: Likewise. opcodes/ChangeLog: 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * frv-asm.c: Rebuilt. * frv-desc.c: Rebuilt. * frv-desc.h: Rebuilt. * frv-dis.c: Rebuilt. * frv-ibld.c: Rebuilt. * frv-opc.c: Rebuilt. * frv-opc.h: Rebuilt.
* 2005-01-21 Fred Fish <fnf@specifixinc.com>Fred Fish2005-01-212-3/+9
| | | | | | * mips.h: Change INSN_ALIAS to INSN2_ALIAS. Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC. Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
* 2005-01-19 Fred Fish <fnf@specifixinc.com>Fred Fish2005-01-192-4/+21
| | | | | | | | | * mips.h (struct mips_opcode): Add new pinfo2 member. (INSN_ALIAS): New define for opcode table entries that are specific instances of another entry, such as 'move' for an 'or' with a zero operand. (INSN_READ_MDMX_ACC): Redefine from 0 to 0x2. (INSN_WRITE_MDMX_ACC): Redefine from 0 to 0x4.
* * mips.h (CPU_RM9000): Define.Ian Lance Taylor2004-12-092-0/+7
| | | | (OPCODE_IS_MEMBER): Handle CPU_RM9000.
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