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merge-20031214'.
Sprout from cagney_bigcore-20040122-branch 2004-01-19 18:28:59 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch'
Cherrypick from master 2003-12-08 21:19:41 UTC Thomas Fitzsimmons <fitzsim@redhat.com> '2003-12-08 Thomas Fitzsimmons <fitzsim@redhat.com>':
ChangeLog
Makefile.def
Makefile.in
Makefile.tpl
config-ml.in
config/ChangeLog
config/acinclude.m4
configure
configure.in
gettext.m4
include/ChangeLog
include/aout/ChangeLog
include/aout/stab.def
include/coff/ChangeLog
include/demangle.h
include/elf/ChangeLog
include/elf/common.h
include/elf/frv.h
include/elf/m32r.h
include/fibheap.h
include/opcode/ChangeLog
include/opcode/h8300.h
src-release
Delete:
include/ChangeLog-9103
include/coff/ChangeLog-9103
include/elf/ChangeLog-9103
include/opcode/ChangeLog-9103
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'cagney_bigcore-20040122-branch'.
Sprout from ezannoni_pie-20030916-branch 2003-09-16 01:47:54 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch'
Cherrypick from master 2004-01-19 18:28:58 UTC Mark Kettenis <kettenis@gnu.org> '* common.h (NT_OPENBSD_IDENT): Define.':
COPYING.NEWLIB
ChangeLog
Makefile.def
Makefile.in
Makefile.tpl
config-ml.in
config/ChangeLog
config/acinclude.m4
config/acx.m4
config/gettext.m4
configure
configure.in
gettext.m4
include/ChangeLog
include/ChangeLog-9103
include/aout/ChangeLog
include/aout/stab.def
include/bfdlink.h
include/coff/ChangeLog
include/coff/ChangeLog-9103
include/coff/internal.h
include/demangle.h
include/dis-asm.h
include/elf/ChangeLog
include/elf/ChangeLog-9103
include/elf/common.h
include/elf/frv.h
include/elf/m32r.h
include/elf/mips.h
include/elf/mmix.h
include/elf/ppc.h
include/elf/sh.h
include/elf/xtensa.h
include/fibheap.h
include/floatformat.h
include/gdb/ChangeLog
include/gdb/callback.h
include/gdb/sim-frv.h
include/hp-symtab.h
include/obstack.h
include/opcode/ChangeLog
include/opcode/ChangeLog-9103
include/opcode/h8300.h
include/opcode/m68k.h
include/opcode/mips.h
include/opcode/mmix.h
ltconfig
src-release
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'ezannoni_pie-20030916-branch'.
Sprout from cagney_x86i386-20030821-branch 2003-08-21 14:03:24 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch'
Cherrypick from master 2003-09-16 01:47:53 UTC Andrew Cagney <cagney@gnu.org> 'Index: include/ChangeLog':
ChangeLog
MAINTAINERS
config/no-executables.m4
configure
configure.in
include/ChangeLog
include/coff/ChangeLog
include/coff/i860.h
include/dis-asm.h
include/elf/ChangeLog
include/elf/dwarf2.h
include/elf/v850.h
include/floatformat.h
include/opcode/ChangeLog
include/opcode/v850.h
install-sh
missing
src-release
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'cagney_x86i386-20030821-branch'.
Sprout from gdb_6_0-branch 2003-06-22 16:35:52 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch 'gdb_6_0-branch'.'
Cherrypick from master 2003-08-21 14:03:23 UTC Nick Clifton <nickc@redhat.com> 'Add PGI extensions':
ChangeLog
MAINTAINERS
Makefile.def
Makefile.in
Makefile.tpl
config-ml.in
config.if
config.sub
config/ChangeLog
config/gettext.m4
config/progtest.m4
configure
configure.in
include/ChangeLog
include/bfdlink.h
include/coff/ChangeLog
include/coff/ecoff.h
include/coff/i860.h
include/coff/pe.h
include/coff/ti.h
include/coff/xcoff.h
include/demangle.h
include/dis-asm.h
include/elf/ChangeLog
include/elf/dwarf2.h
include/elf/mips.h
include/elf/mmix.h
include/elf/mn10300.h
include/elf/msp430.h
include/elf/ppc.h
include/elf/reloc-macros.h
include/elf/s390.h
include/elf/v850.h
include/nlm/ChangeLog
include/nlm/internal.h
include/opcode/ChangeLog
include/opcode/alpha.h
include/opcode/arc.h
include/opcode/cgen.h
include/opcode/d10v.h
include/opcode/d30v.h
include/opcode/h8300.h
include/opcode/i370.h
include/opcode/i386.h
include/opcode/i860.h
include/opcode/mips.h
include/opcode/mn10300.h
include/opcode/or32.h
include/opcode/pj.h
include/opcode/ppc.h
include/opcode/s390.h
include/opcode/sparc.h
include/opcode/tic80.h
include/opcode/v850.h
include/xtensa-config.h
mkinstalldirs
src-release
symlink-tree
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Sprout from jimb-ppc64-linux-20030613-branch 2003-06-13 13:07:52 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch 'jimb-'
Cherrypick from master 2003-06-22 16:35:51 UTC DJ Delorie <dj@redhat.com> 'merge from gcc':
ChangeLog
Makefile.in
Makefile.tpl
config.guess
config.sub
configure
configure.in
include/ChangeLog
include/ansidecl.h
include/opcode/ChangeLog
include/safe-ctype.h
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ppc64-linux-20030613-branch'.
Sprout from cagney_convert-20030606-branch 2003-06-05 18:47:13 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch'
Cherrypick from master 2003-06-13 13:07:51 UTC Nick Clifton <nickc@redhat.com> '(GNU_ABI_TAG_NETBSD): New tag.':
COPYING.LIBGLOSS
ChangeLog
Makefile.in
Makefile.tpl
config.guess
config.sub
configure
configure.in
include/elf/ChangeLog
include/elf/common.h
include/elf/h8.h
include/gdb/ChangeLog
include/gdb/fileio.h
include/opcode/ChangeLog
include/opcode/h8300.h
include/opcode/ppc.h
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'cagney_convert-20030606-branch'.
Sprout from jimb-ppc64-linux-20030528-branch 2003-05-24 04:22:24 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch 'jimb-'
Cherrypick from master 2003-06-05 18:47:12 UTC Michael Snyder <msnyder@redhat.com> '2003-06-03 Michael Snyder <msnyder@redhat.com>':
COPYING.NEWLIB
ChangeLog
Makefile.def
Makefile.in
Makefile.tpl
README-maintainer-mode
configure
configure.in
include/ChangeLog
include/bfdlink.h
include/elf/ChangeLog
include/elf/common.h
include/elf/v850.h
include/opcode/ChangeLog
include/opcode/h8300.h
ltconfig
Delete:
COPYING.LIBGLOSS
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ppc64-linux-20030528-branch'.
Sprout from cagney_fileio-20030521-branch 2003-05-21 09:48:08 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch'
Cherrypick from master 2003-05-24 04:22:23 UTC Jason Eckhardt <jle@rice.edu> '2003-05-23 Jason Eckhardt <jle@rice.edu>':
ChangeLog
Makefile.in
Makefile.tpl
configure
include/opcode/ChangeLog
include/opcode/i860.h
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'cagney_fileio-20030521-branch'.
Sprout from jimb-ppc64-linux-20030509-branch 2003-05-09 11:36:10 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch 'jimb-'
Cherrypick from master 2003-05-21 09:48:07 UTC Maciej W. Rozycki <macro@codesourcery.com> '2003-05-20 Maciej W. Rozycki <macro@ds2.pg.gda.pl>':
ChangeLog
Makefile.in
Makefile.tpl
config.guess
config.sub
config/ChangeLog
config/acinclude.m4
config/acx.m4
configure
configure.in
etc/ChangeLog
etc/configure.texi
include/ChangeLog
include/bfdlink.h
include/elf/ChangeLog
include/elf/common.h
include/elf/external.h
include/elf/h8.h
include/elf/internal.h
include/libiberty.h
include/opcode/ChangeLog
include/opcode/i860.h
include/opcode/m68hc11.h
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'kettenis_i386newframe-20030419-branch'.
Sprout from kettenis_i386newframe-20030406-branch 2003-04-04 08:15:16 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch'
Cherrypick from master 2003-04-19 00:19:40 UTC DJ Delorie <dj@redhat.com> '* Makefile.tpl (MAKEINFOFLAGS): Default to --split-size=5000000.':
ChangeLog
Makefile.in
Makefile.tpl
configure
configure.in
include/coff/ChangeLog
include/coff/h8300.h
include/coff/h8500.h
include/coff/sh.h
include/elf/ChangeLog
include/elf/common.h
include/opcode/ChangeLog
include/opcode/h8300.h
include/opcode/mips.h
libtool.m4
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'kettenis_i386newframe-20030406-branch'.
Sprout from cagney_frameaddr-20030403-branch 2003-04-02 16:55:27 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch'
Cherrypick from master 2003-04-04 08:15:15 UTC Svein Seldal <Svein.Seldal@solidas.com> 'Namespace cleanup for the tic4x target. Replace s/c4x/tic4x/ and s/c3x/tic3x/. 2003 copyright update':
include/ChangeLog
include/coff/tic4x.h
include/opcode/tic4x.h
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'cagney_framebase-20030326-branch'.
Sprout from cagney_lazyid-20030317-branch 2003-03-17 10:34:30 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch'
Cherrypick from master 2003-03-25 20:56:01 UTC Nick Clifton <nickc@redhat.com> 'Add iWMMXt support':
include/ChangeLog
include/ansidecl.h
include/coff/ChangeLog
include/coff/arm.h
include/elf/ChangeLog
include/elf/arm.h
include/gdb/ChangeLog
include/gdb/sim-arm.h
include/hashtab.h
include/opcode/ChangeLog
include/opcode/s390.h
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'cagney_lazyid-20030317-branch'.
Sprout from offbyone-20030313-branch 2003-03-12 20:47:08 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch'
Cherrypick from master 2003-03-17 10:34:29 UTC Nick Clifton <nickc@redhat.com> '(O_SYS_CMDLINE): New pseudo opcode for command line processing.':
ChangeLog
Makefile.in
Makefile.tpl
include/opcode/ChangeLog
include/opcode/h8300.h
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'cagney_offbyone-20030303-branch'.
Sprout from interps-20030202-branch 2003-01-31 21:24:33 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch'
Cherrypick from master 2003-02-28 18:03:31 UTC Nathanael Nerode <neroden@gcc.gnu.org> ' * Makefile.tpl: Rearrange.':
ChangeLog
Makefile.def
Makefile.in
Makefile.tpl
config.guess
config.sub
configure
configure.in
include/ChangeLog
include/elf/ChangeLog
include/elf/arm.h
include/elf/ia64.h
include/elf/ppc.h
include/elf/ppc64.h
include/gdb/ChangeLog
include/gdb/remote-sim.h
include/libiberty.h
include/opcode/ChangeLog
include/opcode/h8300.h
libtool.m4
ltcf-cxx.sh
ltcf-gcj.sh
ltconfig
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'interps-20030202-branch'.
Sprout from cagney-unwind-20030108-branch 2003-01-09 20:50:26 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch 'cagney-'
Cherrypick from master 2003-01-31 21:24:32 UTC John David Anglin <dave.anglin@nrc-cnrc.gc.ca> ' * hppa.h (ldwa, ldda): Add ordered opcodes.':
ChangeLog
Makefile.in
Makefile.tpl
config.if
configure
configure.in
include/ChangeLog
include/coff/ti.h
include/coff/tic4x.h
include/elf/ChangeLog
include/elf/common.h
include/elf/mips.h
include/elf/ppc.h
include/elf/ppc64.h
include/elf/s390.h
include/elf/sh.h
include/elf/sparc.h
include/hashtab.h
include/opcode/ChangeLog
include/opcode/hppa.h
include/opcode/m68hc11.h
include/splay-tree.h
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* mips.h: Fix missing space in comment.
(INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
(INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
by four bits.
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2003-01-02 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c: Update copyright years to include 2003.
(mips_ip): Fix indentation of "+A", "+B", and "+C" handling.
Additionally, clean up their code slightly and clean up their
comments some more.
* doc/c-mips.texi: Add MIPS32r2 to ".set mipsN" documentation.
[ gas/testsuite/ChangeLog ]
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* gas/mips/elf_arch_mips32r2.d: Fix file description comment.
[ include/opcode/ChangeLog ]
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* mips.h: Update copyright years to include 2002 (which had
been missed previously) and 2003. Make comments about "+A",
"+B", and "+C" operand types more descriptive.
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2002-12-31 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (validate_mips_insn, mips_ip): Recognize
the "+D" operand, which will be used only by the disassembler.
[ gas/testsuite/ChangeLog ]
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0sel-names-mips32.d: New test.
* gas/mips/cp0sel-names-mips32r2.d: New test.
* gas/mips/cp0sel-names-mips64.d: New test.
* gas/mips/cp0sel-names-numeric.d: New test.
* gas/mips/cp0sel-names-sb1.d: New test.
* gas/mips/cp0sel-names.s: New test source file.
* gas/mips/mips.exp: Run new tests.
[ include/opcode/ChangeLog ]
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* mips.h: Note that the "+D" operand type name is now used.
[ opcodes/ChangeLog ]
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_cp0sel_name): New structure.
(mips_cp0sel_names_mips3264, mips_cp0sel_names_mips3264r2)
(mips_cp0sel_names_sb1): New arrays.
(mips_arch_choice): New structure members "cp0sel_names" and
"cp0sel_names_len".
(mips_arch_choices): Add references to new cp0sel_names arrays
as appropriate, and make all existing entries reference
appropriate mips_XXX_names_numeric arrays rather than simply
using NULL.
(mips_cp0sel_names, mips_cp0sel_names_len): New variables.
(lookup_mips_cp0sel_name): New function.
(set_default_mips_dis_options): Set mips_cp0sel_names and
mips_cp0sel_names_len as appropriate. Remove now-unnecessary
checks for NULL register name arrays.
(parse_mips_dis_option): Likewise.
(print_insn_arg): Handle "+D" operand type.
* mips-opc.c (mips_builtin_opcodes): Add new "+D" variants
of mfc0, mtc0, dmfc0, and dmtc0 to print CP0+sel register
names symbolically.
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2002-12-30 Chris Demetriou <cgd@broadcom.com>
* aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case.
* archures.c (bfd_mach_mipsisa32r2): New define.
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_mipsisa32r2): New enum value.
(arch_info_struct): Add entry for I_mipsisa32r2.
* elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach)
(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2.
(_bfd_mips_elf_final_write_processing): Add
bfd_mach_mipsisa32r2 case.
(_bfd_mips_elf_merge_private_bfd_data): Handle merging of
binaries marked as using MIPS32 Release 2.
[ binutils/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register)
changes in MIPS -M options.
[ gas/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* configure.in: Recognize mipsisa32r2, mipsisa32r2el, and
CPU variants.
* configure: Regenerate.
* config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines.
(macro_build): Handle "K" operand.
(macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where
CPU_HAS_DROR and CPU_HAS_ROR are currently used.
(mips_ip): New variable "lastpos", and implement "+A", "+B",
and "+C" operands for MIPS32 Release 2 ins/ext instructions.
Implement "K" operand for MIPS32 Release 2 rdhwr instruction.
(validate_mips_insn): Implement "+" as a way to extend the
allowed operands, and implement "K", "+A", "+B", and "+C"
operands.
(OPTION_MIPS32R2): New define.
(md_longopts): Add entry for OPTION_MIPS32R2.
(OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2.
(md_parse_option): Handle OPTION_MIPS32R2.
(s_mipsset): Reimplement handling of ".set mipsN" options
and add support for ".set mips32r2".
(mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2).
(md_show_usage): Document "-mips32r2" option.
* doc/as.texinfo: Document "-mips32r2" option.
* doc/c-mips.texi: Likewise.
[ gas/testsuite/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0-names-mips32r2.d: New test.
* gas/mips/hwr-names-mips32r2.d: New test.
* gas/mips/hwr-names-numeric.d: New test.
* gas/mips/hwr-names.s: New test source file.
* gas/mips/mips32r2.d: New test.
* gas/mips/mips32r2.s: New test source file.
* gas/mips/mips32r2-ill.l: New test.
* gas/mips/mips32r2-ill.s: New test source file.
* gas/mips/mips.exp: Add mips32r2 architecture data array
entry. Run new tests mentioned above.
[ include/elf/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h (E_MIPS_ARCH_32R2): New define.
[ include/opcode/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h: Document "+" as the start of two-character operand
type names, and add new "K", "+A", "+B", and "+C" operand types.
(OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
(OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
defines.
[ opcodes/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
(mips_hwr_names_mips3264r2): New arrays.
(mips_arch_choice): New "hwr_names" member.
(mips_arch_choices): Adjust for structure change, and add a new
entry for "mips32r2" ISA.
(mips_hwr_names): New variable.
(set_default_mips_dis_options): Set mips_hwr_names.
(parse_mips_dis_option): New "hwr-names" option which sets
mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
(print_insn_arg): Change return type to "int"
and use that to indicate number of characters consumed.
Add support for "+" operand extension character, "+A", "+B",
"+C", and "K" operands.
(print_insn_mips): Adjust for changes to print_insn_arg.
(print_mips_disassembler_options): Adjust for "hwr-names"
addition and "reg-names" change.
* mips-opc (I33): New define (shorthand for INSN_ISA32R2).
(mips_builtin_opcodes): Note that "nop" and "ssnop" are special
forms of "sll". Add new MIPS32 Release 2 instructions: ehb,
di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
Note that hardware rotate instructions (ror, rorv) can be
used on MIPS32 Release 2, and add the official mnemonics
for them (rotr, rotrv) and the similar "rotl" mnemonic for
left-rotate.
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2002-12-27 Chris Demetriou <cgd@broadcom.com>
* doc/binutils.texi (objdump): Document MIPS -M options.
[ gas/testsuite/ChangeLog ]
2002-12-27 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0-names-mips32.d: New file.
* gas/mips/cp0-names-mips64.d: New file.
* gas/mips/cp0-names-numeric.d: New file.
* gas/mips/cp0-names-sb1.d: New file.
* gas/mips/cp0-names.s: New file.
* gas/mips/fpr-names-32.d: New file.
* gas/mips/fpr-names-64.d: New file.
* gas/mips/fpr-names-n32.d: New file.
* gas/mips/fpr-names-numeric.d: New file.
* gas/mips/fpr-names.s: New file.
* gas/mips/gpr-names-32.d: New file.
* gas/mips/gpr-names-64.d: New file.
* gas/mips/gpr-names-n32.d: New file.
* gas/mips/gpr-names-numeric.d: New file.
* gas/mips/gpr-names.s: New file.
* gas/mips/mips.exp: Run new tests.
[ include/ChangeLog ]
2002-12-27 Chris Demetriou <cgd@broadcom.com>
* dis-asm.h (print_mips_disassembler_options): Prototype.
[ include/opcode/ChangeLog ]
2002-12-19 Chris Demetriou <cgd@broadcom.com>
* mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
(OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
(OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
(OP_OP_SDC2, OP_OP_SDC3): Define.
[ opcodes/ChangeLog ]
2002-12-27 Chris Demetriou <cgd@broadcom.com>
* disassemble.c (disassembler_usage): Add invocation of
print_mips_disassembler_options.
* mips-dis.c (print_mips_disassembler_options)
(set_default_mips_dis_options, parse_mips_dis_option)
(parse_mips_dis_options, choose_abi_by_name, choose_arch_by_name)
(choose_arch_by_number): New functions.
(mips_abi_choice, mips_arch_choice): New structures.
(mips32_reg_names, mips64_reg_names, reg_names): Remove.
(mips_gpr_names_numeric, mips_gpr_names_oldabi)
(mips_gpr_names_newabi, mips_fpr_names_numeric)
(mips_fpr_names_32, mips_fpr_names_n32, mips_fpr_names_64)
(mips_cp0_names_numeric, mips_cp0_names_mips3264)
(mips_cp0_names_sb1, mips_abi_choices, mips_arch_choices)
(mips_processor, mips_isa, mips_gpr_names, mips_fpr_names)
(mips_cp0_names): New variables.
(print_insn_args): Use new variables to print GPR, FPR, and CP0
register names.
(mips_isa_type): Remove.
(print_insn_mips): Remove ISA and CPU setup since it is now done...
(_print_insn_mips): Here. Remove register setup code, and
call set_default_mips_dis_options and parse_mips_dis_options
instead.
(print_mips16_insn_arg): Use mips_gpr_names instead of mips32_names.
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"default_args".
(struct not_wot): Constify "args".
(struct not): Constify "name".
(numopcodes): Delete.
(endop): Delete.
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* pj-dis.c (print_insn_pj): Adjust for pj_opc_info_t change.
* config/tc-pj.c (little, big, parse_exp_save_ilp): Prototype.
(c_to_r, ipush_code, fake_opcode, alias): Likewise.
(fake_opcode): Adjust for pj_opc_int_t change.
(md_begin): Likewise.
(md_assemble): Likewise.
(ipush_code): Correct parse_exp_save_ilp call. Test pending_reloc
instead of non-existent third arg of parse_exp_save_ilp.
(md_parse_option): Correct "little" and "big" calls.
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bfd/ChangeLog
* cpu-ia64-opc.c: Add operand constant "ar.csd".
gas/ChangeLog
* config/tc-ia64.c (pseudo_func): Add "@pause" constant for "hint"
instruction.
(emit_one_bundle): Handle "hint" instruction.
(operand_match): Match IA64_OPND_AR_CSD.
gas/testsuite/ChangeLog
* gas/ia64/opc-b.d: Update for instructions added by SDM2.1.
* gas/ia64/opc-b.s: Ditto.
* gas/ia64/opc-f.d: Ditto.
* gas/ia64/opc-f.s: Ditto.
* gas/ia64/opc-i.d: Ditto.
* gas/ia64/opc-i.s: Ditto.
* gas/ia64/opc-m.d: Ditto.
* gas/ia64/opc-m.s: Ditto.
* gas/ia64/opc-x.d: Ditto.
* gas/ia64/opc-x.s: Ditto.
include/opcode/ChangeLog
* ia64.h: Fix copyright message.
(IA64_OPND_AR_CSD): New operand kind.
opcodes/ChangeLog
* ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction.
* ia64-opc-b.c: Add "hint.b" instruction.
* ia64-opc-f.c: Add "hint.f" instruction.
* ia64-opc-i.c: Add "hint.i" instruction.
* ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and
"cmp8xchg16" instructions.
* ia64-opc-x.c: Add "hint.x" instruction.
* ia64-opc.h (AR_CSD): New macro.
* ia64-ic.tbl: Update according to SDM2.1.
* ia64-raw.tbl: Ditto.
* ia64-waw.tbl: Ditto.
* ia64-gen.c (in_iclass): Handle "hint" like "nop".
(lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD],
AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR].
* ia64-asmtab.c: Regenerate.
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* ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
bfd/
* cpu-ia64-opc.c (elf64_ia64_operands): Add ldxmov entry.
opcodes/
* ia64-opc-m.c: Add ld8.mov.
* ia64-asmtab.c: Regenerate.
gas/
* config/tc-ia64.c (operand_match): Add IA64_OPND_LDXMOV case.
gas/testsuite/
* gas/ia64/ldxmov-1.[ds]: New.
* gas/ia64/ldxmov-2.[ls]: New.
* gas/ia64/ia64.exp: Run them.
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Constify "leaf" and "multi".
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* h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
fields.
(h8_opcodes). Modify initializer and initializer macros to no
longer initialize the removed fields.
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* h8300.h (h8_opcode): Remove 'length' field.
(h8_opcodes): Mark as 'const' (both the declaration and
definition). Modify initializer and initializer macros to no
longer initialize the length field.
2002-11-11 Klee Dienes <kdienes@apple.com>
* h8300-dis.c: Include libiberty.h (for xmalloc).
(struct h8_instruction): New type, used to wrap h8_opcodes with a
length field (computed at run-time).
(h8_instructions): New variable.
(bfd_h8_disassemble_init): Allocate the storage for
h8_instructions. Fill h8_instructions with pointers to the
appropriate opcode and the correct value for the length field.
(bfd_h8_disassemble): Iterate through h8_instructions instead of
h8_opcodes.
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* arc.h (arc_ext_opcodes): Declare as extern.
(arc_ext_operands): Declare as extern.
* i860.h (i860_opcodes): Declare as const.
2002-11-18 Klee Dienes <kdienes@apple.com>
* arc-opc.c (arc_ext_opcodes): Define.
(arc_ext_operands): Define.
* i386-dis.c (Suffix3DNow): Declare as const.
* arm-opc.h (arm_opcodes): Declare as const.
(thumb_opcodes): Declare as const.
* h8500-opc.h (h8500_table): Declare as const.
(h8500_table): Use a NULL for the opcode in the terminator, so
that code testing (opcode->name) behaves correctly.
* mcore-opc.h (mcore_table): Declare as const.
* sh-opc.h (sh_table): Declare as const.
* w65-opc.h (optable): Declare as const.
* z8k-opc.h (z8k_table): Declare as const.
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parameters. Added support for new opcode-list format. General
error message fixups.
(c4x_inst_add): Reject insn not for our CPU
(md_begin): Added matrix for setting the proper opcode-level &
device-flags according to cpu type and revision. Rewrite the
opcode hasher.
(c4x_operand_parse): Fix opcode bug
(c4x_operands_match): New function argument. Added dry-run
mechanism, that is optional error generation. Added constraint 'i'
and 'j'.
(c4x_insn_check): Added new function for post-verification of the
generated insn.
(md_assemble): Check all opcodes before croaking because of an
argument mismatch. Need this to be able to fully support
ortogonally arguments.
(md_parse_options): Revised commandprompt swicthes and added new
ones.
(md_show_usage): Complete rewrite of printout.
* gas/testsuite/gas/tic4x/addressing.s: Fix bug in one insn
* gas/testsuite/gas/tic4x/addressing_c3x.d: Update thereafter
* gas/testsuite/gas/tic4x/addressing_c4x.d: Update thereafter
* gas/testsuite/gas/tic4x/allopcodes.S: Add support for new
opclass.h changes
* gas/testsuite/gas/tic4x/opclasses.h: Added testsuites for
the new enhanced opcodes.
* gas/testsuite/gas/tic4x/opcodes.s: Regenerate
* gas/testsuite/gas/tic4x/opcodes_c3x.d: Update from above
* gas/testsuite/gas/tic4x/opcodes_c4x.d: Update from above
* gas/testsuite/gas/tic4x/opcodes_new.d: Added new testsuite for
the enhanced and special insns.
* gas/testsuite/gas/tic4x/tic4x.exp: Added the opcodes_new testsuite
* include/opcode/tic4x.h: File reordering. Added enhanced opcodes.
* opcodes/tic4x-dis.c: Added support for enhanced and special
insn.
(c4x_print_op): Added insn class 'i' and 'j'
(c4x_hash_opcode_special): Add to support special insn
(c4x_hash_opcode): Update to support the new opcode-list
format. Add support for the new special insns.
(c4x_disassemble): New opcode-list support.
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* opcode/m88k.h (INSTAB): Remove 'next' field.
(instruction): Remove definition; replace with extern declaration
and mark as const.
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(c4x_operands_match): Added check for 8-bits LDF insn. Give
warning when using constant direct bigger than 2^16. Add the new
arguments.
* include/opcode/tic4x.h: Major rewrite of entire file. Define
instruction classes, and put each instruction into a class.
* opcodes/tic4x-dis.c: (c4x_print_op): Add support for the new
argument format. Fix bug in 'N' register printer.
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include/ChangeLog)
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* mips.h: Update comment for new opcodes.
(OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
(OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
(INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
(CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
(OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
Don't match CPU_R4111 with INSN_4100.
[opcodes/]
* mips-dis.c (print_insn_arg): Handle '[', ']', 'e' and '%'.
(mips_isa_type): Handle bfd_mach_mips4120, bfd_mach_mips5400
and bfd_mach_mips5500.
* mips-opc.c (V1): Include INSN_4111 and INSN_4120.
(N411, N412, N5, N54, N55): New convenience defines.
(mips_builtin_opcodes): Add vr4120, vr5400 and vr5500 opcodes.
Change dmadd16 and madd16 from V1 to N411.
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From matthew green <mrg@redhat.com>
* ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
instructions.
(PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
e500x2 Integer select, branch locking, performance monitor,
cache locking and machine check APUs, respectively.
(PPC_OPCODE_EFS): New opcode type for efs* instructions.
(PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
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(M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
memory banks.
(M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
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(mips_ip): Likewise.
* mips.h (INSN_MIPS16): New define.
* mips-dis.c (mips_isa_type): Add MIPS16 insn handling.
* mips-opc.c (I16): New define.
(mips_builtin_opcodes): Make jalx an I16 insn.
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* config/tc-i386.c (process_suffix): Remove intel mode movsx and
movzx fudges.
(md_assemble): Instead, zap the suffix here.
include/opcode/ChangeLog
* i386.h: Remove IgnoreSize from movsx and movzx.
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(CONST): Don't define.
* convex.h: Replace CONST with const.
(CONST): Don't define.
* dlx.h: Replace CONST with const.
* or32.h (CONST): Don't define.
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2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* config/tc-mips.c (mips_set_options): New "ase_mdmx" member.
(mips_opts): Initialize "ase_mdmx" member.
(file_ase_mdmx): New variable.
(CPU_HAS_MDMX): New macro.
(md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx
based on command line options and configuration defaults.
(macro_build): Note in comment that use of MDMX in macros is
not currently allowed.
(validate_mips_insn): Add support for the "O", "Q", "X", "Y", and
"Z" MDMX operand types.
(mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set,
and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand
types.
(OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option):
Add support for "-mdmx" and "-no-mdmx" options.
(OPTION_ELF_BASE): Move to accomodate new options.
(s_mipsset): Support ".set mdmx" and ".set nomdmx".
(mips_elf_final_processing): Set MDMX ASE ELF header flag if
file_ase_mdmx was set.
* doc/as.texinfo: Document -mdmx and -no-mdmx options.
* doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set
nomdmx" directives.
[ gas/testsuite/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
* gas/mips/mips64-mdmx.s: New file.
* gas/mips/mips64-mdmx.d: Likewise.
* gas/mips/mips.exp: Run new "mips64-mdmx" test.
[ include/opcode/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
* mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
(MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
(MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
(INSN_MDMX): New constants, for MDMX support.
(opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
[ opcodes/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y',
and 'Z' formats, for MDMX.
(mips_isa_type): Add MDMX instructions to the ISA
bit mask for bfd_mach_mipsisa64.
* mips-opc.c: Add support for MDMX instructions.
(MX): New definition.
* mips-dis.c: Update copyright years to include 2002.
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* sparc.h: Likewise.
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