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* Add XCOFF64 support.Clinton Popetz2000-04-262-0/+240
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bfd: * Makefile.am (coff64-rs6000.lo): New rule. * Makefile.in: Regenerate. * coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data, xcoff_is_local_label_name, xcoff_rtype2howto, xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p, xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap, xcoff_write_archive_contents): No longer static, and prefix with _bfd_. (NO_COFF_SYMBOLS): Define. (xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in, xcoff64_swap_aux_out): New functions; handle xcoff symbol tables internally. (MINUS_ONE): New macro. (xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS relocation. (coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in, coff_SWAP_aux_out): Map to the new functions. * coff64-rs6000.c: New file. * libcoff.h (bfd_coff_backend_data): Add new fields _bfd_coff_force_symnames_in_strings and _bfd_coff_debug_string_prefix_length. (bfd_coff_force_symnames_in_strings, bfd_coff_debug_string_prefix_length): New macros for above fields. * coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic. Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead of using coff_swap_sym_in directly. (FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64. (coff_set_flags) Set magic for XCOFF64. (coff_compute_section_file_positions): Add symbol name length to string section length if bfd_coff_debug_string_prefix_length is true. (coff_write_object_contents): Don't do reloc overflow for XCOFF64. (coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of using coff_swap_lineno_in directly. (bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings and _bfd_coff_debug_string_prefix_length fields. * coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force symbol names into strings table when bfd_coff_force_symnames_in_strings is true. * coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR, SET_RELOC_VADDR): New macros. (coff_swap_reloc_in, coff_swap_reloc_out): Use above macros. (coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C code. (coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64 changes within RS6000COFF_C specific code. (coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC, MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO. * reloc.c (bfd_perform_relocation, bfd_install_relocation): Extend existing hack on target name. * xcofflink.c (XCOFF_XVECP): Extend existing hack on target name. * coff-tic54x.c (ticof): Keep up to date with new fields in bfd_coff_backend_data. * config.bfd: Add bfd_powerpc_64_arch to targ_arch and define targ_selvecs to include rs6000coff64_vec for rs6000. * configure.in: Add rs6000coff64_vec case. * cpu-powerpc.c: New bfd_arch_info_type. gas: * as.c (parse_args): Allow md_parse_option to override -a listing option. * config/obj-coff.c (add_lineno): Change type of offset parameter from "int" to "bfd_vma." * config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine." (ppc_mach, ppc_subseg_align, ppc_target_format): New. (ppc_change_csect): Align correctly for XCOFF64. (ppc_machine): New function, which discards "ppc_machine" line. (ppc_tc): Cons for 8 when code is 64 bit. (md_apply_fix3): Don't check operand->insert. Handle 64 bit relocations. (md_parse_option): Handle -a64 and -a32. (ppc_xcoff64): New. * config/tc-ppc.h (TARGET_MACH): Define. (TARGET_FORMAT): Move to function. (SUB_SEGMENT_ALIGN): Use ppc_subseg_align. include: * include/coff/rs6k64.h: New file. opcodes: * configure.in: Add bfd_powerpc_64_arch. * disassemble.c (disassembler): Use print_insn_big_powerpc for 64 bit code.
* * hppa.h (pa_opcodes): New opcodes for PA2.0 wide modeJeff Law2000-04-212-25/+44
| | | | | | | | | forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements). New operand types l,y,&,fe,fE,fx added to support above forms. (pa_opcodes): Replaced usage of 'x' as source/target for floating point double-word loads/stores with 'fx'. Fr
* IA-64 ELF support.Jim Wilson2000-04-216-0/+573
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* Clean up load page support for tic54x.Tim Wall2000-04-183-18/+17
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* Initial patches for IA-64 EFI (64-bit PE) support.Jim Wilson2000-04-174-7/+290
| | | | | | | | | | | | | | | | | * pe.h (PEP64AOUTHDR): New header for PE+. (PEP64AOUTSZ): New macro. (IMAGE_SUBSYSTEM_UNKNOWN): New macro. (IMAGE_SUBSYSTEM_NATIVE): Ditto. (IMAGE_SUBSYSTEM_WINDOWS_GUI): Ditto. (IMAGE_SUBSYSTEM_WINDOWS_CUI): Ditto. (IMAGE_SUBSYSTEM_POSIX_CUI): Ditto. (IMAGE_SUBSYSTEM_WINDOWS_CE_GUI): Ditto. (IMAGE_SUBSYSTEM_EFI_APPLICATION): Ditto. (IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER): Ditto. (IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER): Ditto. * internal.h (PE_DEF_FILE_ALIGNMENT): Define only if not defined already. * ia64.h: New file.
* 2000-04-14 H.J. Lu <hjl@gnu.org>H.J. Lu2000-04-142-1/+5
| | | | * common.h (ELFOSABI_TRUE64): Renamed to ELFOSABI_TRU64.
* 2000-04-14 H.J. Lu <hjl@gnu.org>H.J. Lu2000-04-142-0/+17
| | | | | | | | | | * common.h (ELFOSABI_NETBSD): Defined. (ELFOSABI_HURD): Likewise. (ELFOSABI_SOLARIS): Likewise. (ELFOSABI_MONTEREY): Likewise. (ELFOSABI_IRIX): Likewise. (ELFOSABI_FREEBSD): Likewise. (ELFOSABI_TRUE64): Likewise.
* Remove U suffix from constants for K&R compilers.Alan Modra2000-04-132-4/+9
| | | | Fix a couple of 64 bit nits.
* Mods to allow compilation of BFD all targets.Tim Wall2000-04-112-3/+13
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* Fix copyright comments and file comments.Tim Wall2000-04-082-9/+18
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* Merge arm-oabi.h into arm.hNick Clifton2000-04-083-127/+65
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* BFD and include/coff support for tic54x target.Tim Wall2000-04-074-2/+450
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* Add definitions of flags in e_flags field from version A-08 of ARM ELF spec.Nick Clifton2000-04-062-0/+20
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* * splay-tree.h (splay_tree_remove): Declare.Richard Henderson2000-04-062-0/+6
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* sh-dsp REPEAT support:Joern Rennecke2000-04-054-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | opcodes: * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4. Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT. (sh_arg_type): Add A_PC. (sh_table): Update entries using immediates. Add repeat. * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4. Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT. gas: * config/tc-sh.c (immediate): Delete. (sh_operand_info): Add immediate member. (parse_reg): Use A_PC for pc. (parse_exp): Add second argument 'op'. All callers changed. (parse_at): Expect pc to be coded as A_PC. Use immediate field in *op. (insert): Add fourth argument 'op'. All callers changed. (build_relax): Add second argument 'op'. All callers changed. (insert_loop_bounds): New function. (build_Mytes): Remove DISP_4. Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT. (assemble_ppi): Use immediate field in *operand. (sh_force_relocation): Handle BFD_RELOC_SH_LOOP_{START,END}. (md_apply_fix): Likewise. (tc_gen_reloc): Likewise. Check for a pcrel BFD_RELOC_SH_LABEL. include/coff: * sh.h (R_SH_LOOP_START, R_SH_LOOP_END): Define. include/elf: * sh.h (R_SH_LOOP_START, R_SH_LOOP_END): New RELOC_NUMBERs. bfd: * reloc.c (_bfd_relocate_contents): Add BFD_RELOC_SH_LOOP_START and BFD_RELOC_SH_LOOP_END. * elf32-sh.c (sh_elf_howto_tab): Change special_func to sh_elf_ignore_reloc for all entries that sh_elf_reloc used to ignore. Add entries for R_SH_LOOP_START and R_SH_LOOP_END. (sh_elf_reloc_loop): New function. (sh_elf_reloc): No need to test for always-to-be-ignored relocs any more. (sh_rel): Add entries for BFD_RELOC_SH_LOOP_{START,END}. (sh_elf_relocate_section): Handle BFD_RELOC_SH_LOOP_{START,END}. * bfd-in2.h, libbfd.h: Regenerate.
* Move translated part of bug report string back into .c files soAlan Modra2000-04-042-1/+5
| | | | xgettext can find it. Regnerate .pot files.
* Move bug report string to one place.Alan Modra2000-04-032-0/+7
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* * aout64.h (RELOC_EXT_BITS_EXTERN_BIG): Wrap definition in #ifndef.Hans-Peter Nilsson2000-04-032-0/+25
| | | | | | | | (RELOC_EXT_BITS_EXTERN_LITTLE): Ditto. (RELOC_EXT_BITS_TYPE_BIG): Ditto. (RELOC_EXT_BITS_TYPE_SH_BIG): Ditto. (RELOC_EXT_BITS_TYPE_LITTLE): Ditto. (RELOC_EXT_BITS_TYPE_SH_LITTLE): Ditto.
* Fix value of SHORT_A1.Nick Clifton2000-03-272-15/+21
| | | | Move SHORT_AR to end of list of short instructions.
* ATMEL AVR microcontroller support.Alan Modra2000-03-275-0/+72
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* Mostly cosmetic. Fixes to comments. Don't start as_bad and as_warnAlan Modra2000-03-262-62/+80
| | | | messages with capital. Don't malign Unixware, malign SysV386 instead.
* * partition.h: New file.Christopher Faylor2000-03-251-0/+81
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* merge from gccJason Merrill2000-03-242-60/+106
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* * internal.h: Fix a typo in the comment for R_MOVL2.Jeff Law2000-03-152-1/+5
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* In bfd/:Geoffrey Keating2000-03-112-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * elf32-mips.c (mips_elf_next_relocation): Rename from mips_elf_next_lo16_relocation, and generalize to look for any relocation type. (elf_mips_howto_table): Make R_MIPS_PC16 pcrel_offset. (elf_mips_gnu_rel_hi16): Howto for R_MIPS_GNU_REL_HI16. (elf_mips_gnu_rel_lo16): Howto for R_MIPS_GNU_REL_LO16. (elf_mips_gnu_rel16_s2): Howto for R_MIPS_GNU_REL16_S2. (elf_mips_gnu_pcrel64): Howto for R_MIPS_PC64. (elf_mips_gnu_pcrel32): Howto for R_MIPS_PC32. (bfd_elf32_bfd_reloc_type_lookup): Add new relocs. (mips_rtype_to_howto): Likewise. (mips_elf_calculate_relocation): Handle new relocs. (_bfd_mips_elf_relocate_section): REL_HI16/REL_LO16 relocs are paired. The addend for R_MIPS_GNU_REL16_S2 is shifted right two bits. In gas/: * config/tc-mips.c (mips_ip): Don't put stuff in .rodata when embedded-pic. * config/tc-mips.c (SWITCH_TABLE): The ELF embedded-pic implementation doesn't have special handling for switch statements. (macro_build): Allow for code in sections other than .text. (macro): Likewise. (mips_ip): Likewise. (md_apply_fix): Do pc-relative relocation madness for MIPS ELF. Don't perform relocs if we will be outputting them. (tc_gen_reloc): For ELF, just use fx_addnumber for pc-relative relocations. Allow BFD_RELOC_16_PCREL_S2 relocs when embedded-pic. In gas/testsuite/: * gas/mips/empic.d: New file. * gas/mips/empic.s: New file. * gas/mips/mips16-e.d: New file. * gas/mips/mips16-e.s: New file. * gas/mips/mips16-f.d: New file. * gas/mips/mips16-f.s: New file. * gas/mips/mips.exp: Add empic, mips16-e. Add mips16-f as an expected failure. In include/elf: * mips.h: Add R_MIPS_GNU_REL_HI16, R_MIPS_GNU_REL_LO16, R_MIPS_GNU_REL16_S2, R_MIPS_PC64 and R_MIPS_PC32 relocation numbers.
* Apply patch for 100679Nick Clifton2000-03-022-35/+56
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* 2000-03-01 H.J. Lu <hjl@gnu.org>H.J. Lu2000-03-012-2/+10
| | | | | * bfdlink.h (bfd_link_callbacks): Add a boolean arg to the undefined_symbol callback.
* Defone {MIPS|SH}_PE_MAGICNick Clifton2000-02-283-1/+7
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* Extend the i386 gas testsuite to do some tests for intel_syntax. Fix allAlan Modra2000-02-252-2/+7
| | | | | | | the errors exposed by this addition. These were intel mode "fi... word ptr", "fi... dword ptr", "jmp Imm seg, Imm offset", "out dx,al". The failure with intel "out dx,al" was also present in att "out al,dx". Extend testsuite to catch this case too.
* Rename 'flags' to 'signed_overflow_ok_p'Nick Clifton2000-02-242-9/+8
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* 2000-02-24 Andrew Haley <aph@cygnus.com>Andrew Haley2000-02-242-1/+27
| | | | | | * cgen.h (CGEN_INSN_MACH_HAS_P): New macro. (CGEN_CPU_TABLE): flags: new field. Add prototypes for new functions.
* Add support for WinCE targeted toolchains.Nick Clifton2000-02-245-2/+300
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* Forgot Changelog for last i386.h change.Alan Modra2000-02-241-0/+4
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* Correct intel_syntax fsub* and fdiv* handling. Oh, how I'd like to be ridAlan Modra2000-02-241-4/+9
| | | | of UNIXWARE_COMPAT.
* Add IBM 370 support.Alan Modra2000-02-236-2/+326
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* * opcode/d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation cannotChandra Chavva2000-02-222-1/+8
| | | | be combined in parallel with ADD/SUBppp.
* Updated comment.Nick Clifton2000-02-221-1/+1
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* Remove use of ELF_ST_OTHER.Nick Clifton2000-02-222-3/+8
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* g2000-02-22 Andrew Haley <aph@cygnus.com>Andrew Haley2000-02-222-1/+8
| | | | * mips.h: (OPCODE_IS_MEMBER): Add comment.
* ChangeLog change only.Andrew Haley2000-02-221-1/+3
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* merge with include from egcs 2000-02-22Ian Lance Taylor2000-02-222-7/+112
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* This commit was generated by cvs2svn to track changes on a CVS vendorIan Lance Taylor2000-02-225-30/+165
|\ | | | | branch.
| * import libiberty from egcsIan Lance Taylor2000-02-227-90/+301
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* | 1999-12-30 Andrew Haley <aph@cygnus.com>Andrew Haley2000-02-222-2/+10
| | | | | | | | * mips.h (OPCODE_IS_MEMBER): Add gp32 arg.
* | When SIM_HAVE_ENVIRONMENT: use sim_set_trace() to enable tracingAndrew Cagney2000-02-222-3/+20
| | | | | | | | | | | | | | instead of sim_trace() to run the program; include support for ``-o'' option (operating environment); when a signal occurs, only continue execution when operating environment mode. Update d10v.
* | 2000-02-22 H.J. Lu <hjl@gnu.org>Ian Lance Taylor2000-02-222-1/+7
| | | | | | | | * common.h (ELFOSABI_LINUX): Define.
* | This lot mainly cleans up `comparison between signed and unsigned' gccAlan Modra2000-02-212-4/+11
| | | | | | | | | | warnings. One usused var, and a macro parenthesis fix too. Also check input sections are elf when doing gc in elflink.h.
* | bfd:Joern Rennecke2000-02-172-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
* | Add prototypes for ARM register name functions.Nick Clifton2000-02-162-0/+7
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* | wait.h was replaced by gdb/gdb_wait.h.Andrew Cagney2000-02-102-63/+4
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