cygnal - "Cygwin Native Application Lib" --- http://www.kylheku.com/cygnal

	Commit message (Collapse)	Author	Age	Files	Lines
*	Initializing TTBR0 to inner/outer WB	Jiong Wang	2016-03-26	1	-1/+10
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	While running tests on internal systems, we identified an issue in the startup code for newlib on AArch32 systems with Multiprocessor Extensions to the architecture. The issue is we were configuring page table flags to be Inner cacheable/Outer non-cacheable, while for at least architectures with Multiprocessor Extension, we'd configure it to Inner/Outer write-back, no write-allocate, and cacheable. The attached patch fixes this, and no regression on arm-none-eabi bare-metal tests. Adopted suggestion given by Richard offline to avoid using jump. libgloss/ * arm/cpu-init/rdimon-aem.S: Set TTBR0 to inner/outer cacheable WB, and no allocate on WB for arch with multiprocessor extension.
*	2013-10-14 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>	Richard Earnshaw	2013-10-14	2	-8/+20
\| \| \| \| \| \|	* arm/cpu-init/rdimon-aem.S: Disable for M class cores. * arm/crt0.S: Don't call _rdimon_hw_init_hook for non-A class cores. * arm/cpu-init/Makefile.in (CPU_INIT_OBJS): Use CFLAGS.
*	2013-09-20 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>	Richard Earnshaw	2013-09-20	2	-0/+605
	Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> Greta Yorsh <greta.yorsh@arm.com> * arm/Makefile.in: Add support for cpu-init directory and add elf-aprofile-ve.specs. * arm/configure.in: Likewise. * arm/configure: Regenerate. * arm/cpu-init: New directory. * arm/cpu-init/Makefile.in: New file. * arm/cpu-init/rdimon-aem.S: Likewise. * arm/crt0.S: Call _rdimon_init_hook * arm/elf-aprofile-ve.specs: New file.