From 2226614012948569d69e5a9f74ebad2645e3ccba Mon Sep 17 00:00:00 2001 From: cvs2svn <> Date: Sun, 5 May 2002 18:58:18 +0000 Subject: This commit was manufactured by cvs2svn to create branch 'jimb- macro-020506-branch'. Sprout from gdb_5_2-branch 2002-03-11 00:01:12 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch 'gdb_5_2-branch'.' Cherrypick from master 2002-05-05 18:58:17 UTC Alexandre Oliva '* configure.in (noconfigdirs): Don't disable libgcj on': ChangeLog MAINTAINERS Makefile.in config.guess config.sub config/ChangeLog config/acinclude.m4 config/mh-a68bsd config/mh-apollo68 config/mh-cxux config/mh-decstation config/mh-dgux config/mh-dgux386 config/mh-djgpp config/mh-hp300 config/mh-hpux config/mh-hpux8 config/mh-interix config/mh-irix5 config/mh-irix6 config/mh-lynxrs6k config/mh-mingw32 config/mh-ncr3000 config/mh-ncrsvr43 config/mh-necv4 config/mh-openedition config/mh-riscos config/mh-sco config/mh-solaris config/mh-sysv config/mh-sysv4 config/mh-sysv5 config/mt-aix43 config/mt-alphaieee config/mt-linux configure configure.in include/ChangeLog include/coff/ChangeLog include/coff/rs6k64.h include/dyn-string.h include/elf/ChangeLog include/elf/dwarf2.h include/floatformat.h include/opcode/ChangeLog include/opcode/i386.h include/opcode/mips.h include/opcode/pdp11.h include/xregex2.h ltmain.sh Delete: config/mh-irix4 config/mh-lynxos config/mh-sun3 config/mh-vaxult2 config/mt-armpic config/mt-elfalphapic config/mt-i370pic config/mt-ia64pic config/mt-m68kpic config/mt-papic config/mt-ppcpic config/mt-s390pic config/mt-sparcpic config/mt-x86pic --- include/opcode/mips.h | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) (limited to 'include/opcode/mips.h') diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 1469e1072..96c7a576e 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -316,6 +316,11 @@ struct mips_opcode #define INSN_ISA32 0x00000200 #define INSN_ISA64 0x00000400 +/* Masks used for MIPS-defined ASEs. */ + +/* MIPS-3D ASE */ +#define INSN_MIPS3D 0x00004000 + /* Chip specific instructions. These are bitmasks. */ /* MIPS R4650 instruction. */ @@ -367,10 +372,10 @@ struct mips_opcode #define CPU_MIPS64 64 #define CPU_SB1 12310201 /* octal 'SB', 01. */ -/* Test for membership in an ISA including chip specific ISAs. - INSN is pointer to an element of the opcode table; ISA is the - specified ISA to test against; and CPU is the CPU specific ISA - to test, or zero if no CPU specific ISA test is desired. */ +/* Test for membership in an ISA including chip specific ISAs. INSN + is pointer to an element of the opcode table; ISA is the specified + ISA/ASE bitmask to test against; and CPU is the CPU specific ISA to + test, or zero if no CPU specific ISA test is desired. */ #define OPCODE_IS_MEMBER(insn, isa, cpu) \ (((insn)->membership & isa) != 0 \ -- cgit v1.2.3