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authorKaz Kylheku <kaz@kylheku.com>2021-03-02 07:36:13 -0800
committerKaz Kylheku <kaz@kylheku.com>2021-03-02 07:36:13 -0800
commit5bdef4456bf7abce17304414077f14fed528fb54 (patch)
treee49ce64a11fbf9e6c9919954d6ea077ae7801065
parent942170704b38f934c91e69233e695a867eb66539 (diff)
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compiler: new peephole cases: if over d reg.
During peephole optimization, new cases can arise where a dreg is tested. * share/txr/stdlib/optimize.tl (basic-blocks peephole-block): Test for (if dreg ...) and (ifq dreg nil), eliminating the instruction or rewriting to jmp. Could be worth it to do another thread and dead code elimination.
-rw-r--r--share/txr/stdlib/optimize.tl6
1 files changed, 6 insertions, 0 deletions
diff --git a/share/txr/stdlib/optimize.tl b/share/txr/stdlib/optimize.tl
index 813264df..411af8d9 100644
--- a/share/txr/stdlib/optimize.tl
+++ b/share/txr/stdlib/optimize.tl
@@ -385,6 +385,12 @@
^((if (t ,reg) ,xbl.label)))
(t insns))))
(@jelse insns))))
+ (@(require ((if @(as reg (d @dn)) @jlabel) . @nil)
+ (not (memqual reg bb.lt-dregs)))
+ nil)
+ (@(require ((ifq @(as reg (d @dn)) (t 0) @jlabel) . @nil)
+ (not (memqual reg bb.lt-dregs)))
+ ^((jmp ,jlabel)))
(@else insns)))
(defmeth basic-blocks peephole (bb)